Patents by Inventor Byoung-Jin Cheon

Byoung-Jin Cheon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5214396
    Abstract: A biphase shift keying modulation circuit includes: a clock pulse generator for generating system clock pulses; a random data generating unit for dividing the frequency of the system clock pulses to generate random digital data in synchronism with the divided clock pulses; a data conversion circuit for sequentially shifting the random digital data in synchronism with the system clock pulses and generating parallel shifted data which is multiplied by given resistive values and added to each other to provide an in-phase signal component, and for processing the shifted data and random digital data to provide a quadrature-phase signal component without a direct current component; a carrier wave oscillator for generating a carrier wave signal; and a modulating circuit for modulating the in-phase signal component and quadrature-phase signal component with the carrier wave signal and ninety degree phase-shifted carrier wave, respectively, in which the modulated signals are added to provide a phase modulated signal o
    Type: Grant
    Filed: December 12, 1991
    Date of Patent: May 25, 1993
    Assignee: SamSung Electronics Co., Ltd.
    Inventor: Byoung-Jin Cheon
  • Patent number: 5148127
    Abstract: A biphase shift keying (BPSK) modulation circuit for digital data transmission capable of preventing occurrence of signal distortion, even in phase shifting positions upon a power amplification of modulation signal, by providing a constant envelope characteristic to the modulation signal during the modulation. The BPSK modulation circuit has a clock input receiving a system clock, a data generation device connected to receive the system clock for providing random digital data in synchronization with the system clock, a data conversion device connected to receive the system clock and an output of the data generation device, for providing an in-phase signal component and a quadra-phase signal component in synchronization with the system clock, and a modulation device connected to receive both the in-phase and quadra-phase signal components from the data conversion device, for providing a phase modulation signal of constant envelope on a given carrier-wave signal for the digital data transmission.
    Type: Grant
    Filed: October 3, 1991
    Date of Patent: September 15, 1992
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byoung-Jin Cheon