Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on a winding axis to define a core and an outer circumference. The first electrode includes a first active material portion coated with an active material layer and a first uncoated portion not coated with an active material layer along a winding direction. At least a part of the first uncoated portion is defined as an electrode tab by itself. The first uncoated portion includes a first portion adjacent to the core of the electrode assembly, a second portion adjacent to the outer circumference of the electrode assembly, and a third portion interposed between the first portion and the second portion. The first portion or the second portion has a smaller height than the third portion in the winding axis direction.

Abstract: Disclosed is an electrode assembly, a battery, and a battery pack and a vehicle including the same. In the electrode assembly, a first electrode, a second electrode, and a separator interposed therebetween are wound based on an axis to define a core and an outer circumference. The first electrode includes an uncoated portion at a long side end thereof and exposed out of the separator along a winding axis direction of the electrode assembly. A part of the uncoated portion is bent in a radial direction of the electrode assembly to form a bending surface region that includes overlapping layers of the uncoated portion, and in a partial region of the bending surface region, the number of stacked layers of the uncoated portion is 10 or more in the winding axis direction of the electrode assembly.

Abstract: A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.

Abstract: A semiconductor device including: a first transistor which include a first gate stack on a substrate; and a second transistor which includes a second gate stack on the substrate, wherein the first gate stack includes a first ferroelectric material layer disposed on the substrate, a first work function layer disposed on the first ferroelectric material layer and a first upper gate electrode disposed on the first work function layer, wherein the second gate stack includes a second ferroelectric material layer disposed on the substrate, a second work function layer disposed on the second ferroelectric material layer and a second upper gate electrode disposed on the second work function layer, wherein the first work function layer includes the same material as the second work function layer, and wherein an effective work function of the first gate stack is different from an effective work function of the second gate stack.

Abstract: An electrode assembly, a battery, a battery pack and a vehicle including the same are provided. In the electrode assembly, the uncoated portion of an electrode includes a segment region divided into a plurality of segments, and the segment region includes a plurality of segment groups separated by a group separation pitch along a winding direction. One end of the electrode assembly includes a plurality of segment alignments. In winding turns corresponding to the plurality of segment alignments, group separation pitches of segment groups disposed in a same winding turn are substantially identical, and separation pitches of the segment groups is greater in a winding turn of a region adjacent to the outer circumference of the electrode assembly than in a winding turn of a region adjacent to the core of the electrode assembly.

Abstract: A memory device, and an operating method thereof, includes a memory cell array including a plurality of memory blocks and peripheral circuits for performing a program operation, a read operation, or an erase operation on the plurality of memory blocks. The memory device and method also includes a negative voltage generating circuit for applying a negative voltage to bit lines or a source line of the plurality of memory blocks or the bit lines and the source line in a negative voltage applying operation. The memory device and method further includes control logic for controlling the peripheral circuits to perform the program operation, the read operation, or the erase operation, and controlling the negative voltage generating circuit to perform the negative voltage applying operation after a power-on operation.

Abstract: A controller controls an operation of a semiconductor memory device including a plurality of memory blocks. The controller includes a temperature sensing unit, a period storage unit, and a command generating unit. The temperature sensing unit generates temperature information by sensing a temperature of the semiconductor memory device. The period storage unit updates an output period of a dummy read command that allows the semiconductor memory device to perform a dummy read operation, based on the temperature information. The command generating unit generates the dummy read command, based on the output period.

Abstract: A controller controls an operation of a semiconductor memory device including a plurality of memory blocks. The controller includes a temperature sensing unit, a period storage unit, and a command generating unit. The temperature sensing unit generates temperature information by sensing a temperature of the semiconductor memory device. The period storage unit updates an output period of a dummy read command that allows the semiconductor memory device to perform a dummy read operation, based on the temperature information. The command generating unit generates the dummy read command, based on the output period.

Abstract: A controller controls an operation of a semiconductor memory device including a plurality of memory blocks. The controller includes a temperature sensing unit, a period storage unit, and a command generating unit. The temperature sensing unit generates temperature information by sensing a temperature of the semiconductor memory device. The period storage unit updates an output period of a dummy read command that allows the semiconductor memory device to perform a dummy read operation, based on the temperature information. The command generating unit generates the dummy read command, based on the output period.

Abstract: A controller controls an operation of a semiconductor memory device including a plurality of memory blocks. The controller includes a temperature sensing unit, a period storage unit, and a command generating unit. The temperature sensing unit generates temperature information by sensing a temperature of the semiconductor memory device. The period storage unit updates an output period of a dummy read command that allows the semiconductor memory device to perform a dummy read operation, based on the temperature information. The command generating unit generates the dummy read command, based on the output period.

Abstract: The present invention is to provide a 3D cartilage organoid block prepared by differentiating mesenchymal stem cells into 3D spheroid cartilage tissues, a basic unit for the 3D cartilage spheroid block. The inventors found that both the amount of GAG matrix and the expression of the collagen type2 increased. Therefore, the method of this invention provides clinically applicable cartilage tissues by effectively enhancing the function of the cartilage differentiation constructs according to 2D culture. The 3D cartilage organoid block can be usefully applied to the area, such as, articular cartilage regeneration and plastic surgery, where cartilage tissues restoration is required.

Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.

Abstract: Disclosed is an integral label-free biosensor capable of analyzing a biomolecule with high sensitivity by integrating a light source, a photodetector, an optical waveguide, and a microcantilever on a substrate, and a method of detecting a bio-antigen by using the same. The integral label-free biosensor according to the present invention may be manufactured with low cost, be easily integrated with a silicon electron device, and detect a biomolecule with high sensitivity by using a label-free method.

Abstract: Provided are an apparatus and method for transforming augmented reality information of a head-up display (HUD) for a vehicle.

Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.

Abstract: Provided are an apparatus and method for transforming augmented reality information of a head-up display (HUD) for a vehicle.

Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.

Abstract: The present disclosure relates to a memory system and an operating method thereof. A memory system may include a semiconductor memory device including a cam block and a normal memory block, and a controller suitable for setting an initial setting read voltage according to an option parameter stored in the cam block and controlling the semiconductor memory device to perform a first read operation to the normal memory block according to the initial setting read voltage.

Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.

Abstract: A photoelectric conversion device according to an exemplary embodiment includes a first substrate, a photoelectric conversion layer disposed above the first substrate, a second substrate which is different from the first substrate and disposed on the photoelectric conversion layer, and a nano pillar layer disposed above the second substrate in which the nano pillar layer includes a plurality of nano pillars which is spaced apart from each other, so as to easily absorb the light.