Patents by Inventor Byoung-june Kim

Byoung-june Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8969713
    Abstract: Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: March 3, 2015
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Min-Seok Oh, Jung-Tae Kim, Nam-Kyu Song, Min Park, Yun-Seok Lee, Czang-Ho Lee, Myung-Hun Shin, Byoung-Kyu Lee, Yuk-Hyun Nam, Seung-Jae Jung, Mi-Hwa Lim, Joon-Young Seo, Dong-Uk Choi, Dong-Seop Kim, Byoung-June Kim
  • Patent number: 8932917
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 13, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-June Kim, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Patent number: 8802972
    Abstract: Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: August 12, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Min-Seok Oh, Jung-Tae Kim, Nam-Kyu Song, Min Park, Yun-Seok Lee, Czang-Ho Lee, Myung-Hun Shin, Byoung-Kyu Lee, Yuk-Hyun Nam, Seung-Jae Jung, Mi-Hwa Lim, Joon-Young Seo, Dong-Uk Choi, Dong-Seop Kim, Byoung-June Kim
  • Publication number: 20130295731
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 7, 2013
    Inventors: BYOUNG-JUNE KIM, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Patent number: 8486775
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: July 16, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-June Kim, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Patent number: 8409916
    Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: April 2, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kap-Soo Yoon, Sung-Hoon Yang, Byoung-June Kim, Czang-Ho Lee, Sung-Ryul Kim, Hwa-Yeul Oh, Jae-Ho Choi, Yong-Mo Choi
  • Patent number: 8329500
    Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: December 11, 2012
    Assignees: Samsung Display Co., Ltd., Samsung SDI Co., Ltd.
    Inventors: Byoung-Kyu Lee, Se-Jin Chung, Byoung-June Kim, Czang-Ho Lee, Myung-Hun Shin, Min-Seok Oh, Ku-Hyun Kang, Yuk-Hyun Nam, Seung-Jae Jung, Min Park, Mi-Hwa Lim, Joon-Young Seo
  • Publication number: 20120129295
    Abstract: Disclosed herein is a photoelectric conversion device having a semiconductor substrate including a front side and back side, a protective layer formed on the front side of the semiconductor substrate, a first non-single crystalline semiconductor layer formed on the back side of the semiconductor substrate, a first conductive layer including a first impurity formed on a first portion of a back side of the first non-single crystalline semiconductor layer, and a second conductive layer including the first impurity and a second impurity formed on a second portion of the back side of the first non-single crystalline semiconductor layer.
    Type: Application
    Filed: January 27, 2012
    Publication date: May 24, 2012
    Applicants: SAMSUNG SDI CO., LTD., SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-Seok OH, Jung-Tae Kim, Nam-Kyu Song, Min Park, Yun-Seok Lee, Czang-Ho Lee, Myung-Hun Shin, Byoung-Kyu Lee, Yuk-Hyun Nam, Seung-Jae Jung, Mi-Hwa Lim, Joon-Young Seo, Dong-Uk Choi, Dong-Seop Kim, Byoung-June Kim
  • Publication number: 20120112542
    Abstract: A method of electrically eliminating defective solar cell units that are disposed within an integrated solar cells module and a method of trimming an output voltage of the integrated solar cells module are provided, where the solar cells module has a large number (e.g., 50 or more) of solar cell units integrally disposed therein and initially connected in series one to the next. The method includes providing a corresponding plurality of repair pads, each integrally extending from a respective electrode layer of the solar cell units, and providing a bypass conductor integrated within the module and extending adjacent to the repair pads. Pad-to-pad spacings and pad-to-bypass spacings are such that pad-to-pad connecting bridges may be selectively created between adjacent ones of the repair pads and such that pad-to-bypass connecting bridges may be selectively created between the repair pads and the adjacently extending bypass conductor.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 10, 2012
    Applicants: SAMSUNG SDI CO., LTD., SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Myung-Hun SHIN, Dong-Uk Choi, Byoung-June Kim, Jin-Seock Kim, Czang-Ho Lee, Seung-Jae Jung, Joon-Young Seo
  • Publication number: 20120015487
    Abstract: The present invention provides a thin film transistor array panel comprising a substrate; a gate line containing Ag formed on the substrate at a low temperature to prevent agglomeration, a first gate insulating layer formed on the gate line, a second gate insulating layer formed on the first gate insulating layer, a data line perpendicularly intersecting the gate line, and a thin film transistor connected to the gate line and the data line, and a manufacturing method thereof.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: Sung-Hoon YANG, Won-Suk Shin, Byoung-June Kim
  • Publication number: 20120003769
    Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.
    Type: Application
    Filed: September 15, 2011
    Publication date: January 5, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kap-Soo YOON, Sung-Hoon YANG, Byoung-June KIM, Czang-Ho LEE, Sung-Ryul KIM, Hwa-Yeul OH, Jae-Ho CHOI, Yong-Mo CHOI
  • Patent number: 8088653
    Abstract: A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: January 3, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-June Kim, Sung-Hoon Yang, Min-Seok Oh, Jae-Ho Choi, Yong-Mo Choi
  • Patent number: 8035100
    Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: October 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kap-Soo Yoon, Sung-Hoon Yang, Byoung-June Kim, Czang-Ho Lee, Sung-Ryul Kim, Hwa-Yeul Oh, Jae-Ho Choi, Yong-Mo Choi
  • Patent number: 8013325
    Abstract: The present invention relates to a thin film transistor, a method thereof and an organic light emitting device including the thin film transistor. According to an embodiment of the present invention, the thin film transistor includes a substrate, a control electrode, an insulating layer, a first electrode and a second electrode, a first ohmic contact layer and a second ohmic contact layer, and a semiconductor layer. The control electrode is formed on the substrate, and the insulating layer is formed on the control electrode. The first and the second electrodes are formed on the insulating layer. The first ohmic contact layer and the second ohmic contact layer are formed on the first electrode and the second electrode. The semiconductor layer is formed on the first ohmic contact layer and the second ohmic contact layer to fill between the first and the second electrodes.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: September 6, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Moo Huh, Kyu-Sik Cho, Kunal Girotra, Joo-Hoo Choi, Byoung-June Kim
  • Publication number: 20110183463
    Abstract: A method of manufacturing a thin film transistor (“TFT”) substrate includes forming a first conductive pattern group including a gate electrode on a substrate, forming a gate insulating layer on the first conductive pattern group, forming a semiconductor layer and an ohmic contact layer on the gate insulating layer by patterning an amorphous silicon layer and an oxide semiconductor layer, forming a second conductive pattern group including a source electrode and a drain electrode on the ohmic contact layer by patterning a data metal layer, forming a protection layer including a contact hole on the second conductive pattern group, and forming a pixel electrode on the contact hole of the protection layer. The TFT substrate including the ohmic contact layer formed of an oxide semiconductor is further provided.
    Type: Application
    Filed: December 6, 2010
    Publication date: July 28, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-Ryul KIM, Sung-Hoon YANG, Byoung-June KIM, Czang-Ho LEE, Jae-Ho CHOI, Hwa-Yeul OH, Yong-Mo CHOI
  • Patent number: 7972883
    Abstract: In a method of manufacturing a photoelectric device, a transparent conductive layer is formed on a substrate, and the transparent conductive layer is partially etched using an etching solution including hydrofluoric acid. Thus, a transparent electrode having a concavo-convex pattern on its surface is formed. When the transparent conductive layer is partially etched, a haze of the transparent electrode may be controlled by adjusting an etching time of the transparent conductive layer. Also, since the etching solution is sprayed to the transparent conductive layer to etch the transparent conductive layer, the concavo-convex pattern on the surface of the transparent electrode may be easily formed even though the size of the substrate increases.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Jae Jung, Byoung-June Kim, Jin-Seock Kim, Czang-Ho Lee, Myung-Hun Shin, Joon-Young Seo, Dong-Uk Choi, Byoung-Kyu Lee
  • Patent number: 7964250
    Abstract: A manufacturing method for a flat panel display device includes forming a barrier layer on a flexible plastic substrate by RF sputtering, forming an amorphous silicon layer on the plastic substrate, and subjecting the amorphous silicon layer to a rapid heat treatment so as to thereby improve electrical characteristics and/or homogeneity of the amorphous silicon layer.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: June 21, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-June Kim, Sung-Hoon Yang, Jae-Ho Choi
  • Publication number: 20110124163
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Application
    Filed: February 3, 2011
    Publication date: May 26, 2011
    Inventors: Byoung-June KIM, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Patent number: 7902553
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byoung-June Kim, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Publication number: 20100159633
    Abstract: Provided is a method of manufacturing a photovoltaic device using a Joule heating-induced crystallization method. The method includes: forming a first conductive pattern on a substrate; forming a photoelectric conversion layer on the substrate having the first conductive pattern; and crystallizing at least part of the photoelectric conversion layer by applying an electric field to the photoelectric conversion layer, wherein the photoelectric conversion layer includes a first amorphous semiconductor layer containing first impurities, a second intrinsic, amorphous semiconductor layer, and a third amorphous semiconductor layer containing second impurities.
    Type: Application
    Filed: December 18, 2009
    Publication date: June 24, 2010
    Inventors: Byoung-Kyu LEE, Se-Jin Chung, Byoung-June Kim, Czang-Ho Lee, Myung-Hun Shin, Min-Seok Oh, Ku-Hyun Kang, Yuk-Hyun Nam, Seung-Jae Jung, Min Park, Mi-Hwa Lim, Joon-Young Seo