Patents by Inventor Byoung-Keon Park

Byoung-Keon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200300620
    Abstract: A system for automatically checking seat dimension accuracy for a vehicle may include a storage unit configured to store therein seat design data at a time of designing an actually produced seat and seat scan data obtained by scanning the actually produced seat, a controller configured to determine whether the actually produced seat has been produced to match predesigned dimensions using the seat design data and the seat scan data stored in the storage unit, and an output unit configured to automatically output a result of determination by the controller in a specific form. The system and a method for checking seat dimension accuracy for a vehicle can automatically check whether an actually produced seat has been accurately produced to match designed seat dimensions through automatic comparison of scan data of the actually produced seat with seat design data, and automatically generate a checking result report.
    Type: Application
    Filed: March 12, 2020
    Publication date: September 24, 2020
    Inventors: Baek Hee Lee, Min Hyuk Kwak, Yeong Sik Kim, Jang Woon Park, Byoung Keon Park
  • Patent number: 10147774
    Abstract: A method of manufacturing a thin film transistor (TFT) comprises forming a buffer layer, an amorphous silicon layer, and an insulating layer on a substrate; crystallizing the amorphous silicon layer as a polycrystalline silicon layer; forming a semiconductor layer and a gate insulating layer which have a predetermined shape by simultaneously patterning the polycrystalline silicon layer and the insulating layer; forming a gate electrode including a first portion and a second portion by forming and patterning a metal layer on the gate insulating layer. The first portion is formed on the gate insulating layer and overlaps a channel region of a semiconductor layer, and the second portion contacts the semiconductor layer. A source region and a drain region are formed on the semiconductor layer by doping a region of the semiconductor layer. The region excludes the channel region overlapping the gate electrode and constitutes a region which does not overlap the gate electrode.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: December 4, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jong-Ryuk Park, Dong-Hyun Lee, Jin-Wook Seo, Ki-Yong Lee
  • Patent number: 9947771
    Abstract: A method of fabricating a thin film transistor includes forming a substrate having first and second regions, a semiconductor layer pattern formed in the first region and the second region, and a first gate insulating layer pattern formed on a channel region of the semiconductor layer pattern of the first region. A second gate insulating layer is formed on the substrate, a first conductive layer pattern is formed above the channel region of the first region and above the semiconductor layer pattern of the second region, and an inter-layer insulating layer is formed on the substrate. A second conductive layer pattern is formed in the first region and above the first conductive layer pattern of the second region. The second conductive layer pattern of the first region is coupled to the semiconductor layer pattern of the first region through the second gate insulating layer and the inter-layer insulating layer.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: April 17, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byoung-Keon Park
  • Patent number: 9576797
    Abstract: A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: February 21, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Yun-Mo Chung, Byoung-Keon Park, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Byung-Soo So
  • Patent number: 9406730
    Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 2, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byoung-Keon Park, Jong-Ryuk Park, Yun-Mo Chung, Tak-Young Lee, Jin-Wook Seo, Ki-Yong Lee, Min-Jae Jeong, Yong-Duck Son, Byung-Soo So, Seung-Kyu Park, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung
  • Patent number: 9142405
    Abstract: A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: September 22, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Duck Son, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Byung-Soo So, Seung-Kyu Park, Kil-Won Lee, Yun-Mo Chung, Byoung-Keon Park, Dong-Hyun Lee, Jong-Ryuk Park, Tak-Young Lee, Jae-Wan Jung
  • Publication number: 20150263135
    Abstract: A method of fabricating a thin film transistor includes forming a substrate having first and second regions, a semiconductor layer pattern formed in the first region and the second region, and a first gate insulating layer pattern formed on a channel region of the semiconductor layer pattern of the first region. A second gate insulating layer is formed on the substrate, a first conductive layer pattern is formed above the channel region of the first region and above the semiconductor layer pattern of the second region, and an inter-layer insulating layer is formed on the substrate. A second conductive layer pattern is formed in the first region and above the first conductive layer pattern of the second region. The second conductive layer pattern of the first region is coupled to the semiconductor layer pattern of the first region through the second gate insulating layer and the inter-layer insulating layer.
    Type: Application
    Filed: June 3, 2015
    Publication date: September 17, 2015
    Inventor: Byoung-Keon PARK
  • Publication number: 20150255282
    Abstract: A method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
    Type: Application
    Filed: May 26, 2015
    Publication date: September 10, 2015
    Inventors: Dong-Hyun LEE, Ki-Yong LEE, Jin-Wook SEO, Tae-Hoon YANG, Yun-Mo CHUNG, Byoung-Keon PARK, Kil-Won LEE, Jong-Ryuk PARK, Bo-Kyung CHOI, Byung-Soo SO
  • Patent number: 9117798
    Abstract: A thin film transistor, a method of fabricating the same, and an organic light emitting diode (OLED) display device including the same. The thin film transistor includes a substrate; a semiconductor layer disposed on the substrate and including a channel region; source/drain regions including ions and an offset region; a gate insulating layer disposed on the semiconductor layer; a gate electrode disposed on the gate insulating layer; a first insulating layer disposed on the gate electrode; a second insulating layer disposed on the first insulating layer; and source/drain electrodes disposed on the second insulating layer, and electrically connected to the source/drain regions of the semiconductor layer, respectively. The sum of thicknesses of the gate insulating layer and the first insulating layer that are on the source/drain regions is less than the vertical dispersion depth of the ions included in the source/drain regions.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: August 25, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Hyun-Gue Kim, Maxim Lisachenko, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi
  • Patent number: 9070717
    Abstract: A method of fabricating an organic light emitting diode (OLED) display device having a thin film transistor including a polysilicon layer. The method of fabricating a polysilicon layer includes forming a buffer layer on a substrate, forming a metal catalyst layer on the buffer layer, diffusing a metal catalyst into the metal catalyst layer to the buffer layer, removing the metal catalyst layer, forming an amorphous silicon layer on the buffer layer, and annealing the substrate to crystallize the amorphous silicon layer into a polysilicon layer. The thin film transistor includes a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed above the substrate and on the semiconductor layer, a gate electrode disposed on the gate insulating layer, a source electrode and a drain electrode both electrically connected to the semiconductor layer, and a metal silicide disposed between the buffer layer and the semiconductor layer.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: June 30, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Yun-Mo Chung, Byoung-Keon Park, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Byung-Soo So
  • Patent number: 9070716
    Abstract: A thin film transistor including a substrate having first and second regions, a semiconductor layer pattern formed in the first region and the second region, and a first gate insulating layer pattern formed on a channel region of the semiconductor layer pattern of the first region. A second gate insulating layer is formed on the substrate, a first conductive layer pattern is formed above the channel region of the first region and above the semiconductor layer pattern of the second region, and an inter-layer insulating layer is formed on the substrate. A second conductive layer pattern is formed in the first region and above the first conductive layer pattern of the second region. The second conductive layer pattern of the first region is coupled to the semiconductor layer pattern of the first region through the second gate insulating layer and the inter-layer insulating layer.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: June 30, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byoung-Keon Park
  • Patent number: 9035311
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a capacitor region, a buffer layer disposed on the substrate, a gate insulating layer disposed on the substrate, a lower capacitor electrode disposed on the gate insulating layer in the capacitor region, an interlayer insulating layer disposed on the substrate, and an upper capacitor electrode disposed on the interlayer insulating layer and facing the lower capacitor electrode, wherein regions of each of the buffer layer, the gate insulating layer, the interlayer insulating layer, the lower capacitor electrode, and the upper capacitor electrode have surfaces in which protrusions having the same shape as grain boundaries of the semiconductor layer are formed. The resultant capacitor has an increased surface area, and therefore, an increased capacitance.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Soo-Beom Jo, Dong-Hyun Lee, Kil-Won Lee, Maxim Lisachenko, Yun-Mo Chung, Bo-Kyung Choi, Jong-Ryuk Park, Ki-Yong Lee
  • Patent number: 9034156
    Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
  • Patent number: 8992749
    Abstract: Provided is a sputtering apparatus which deposits a metal catalyst on an amorphous silicon layer at an extremely low concentration in order to crystallize amorphous silicon, and particularly minimizes non-uniformity of the metal catalyst caused by a pre-sputtering process without reducing process efficiency. This sputtering apparatus improves the uniformity of the metal catalyst deposited on the amorphous silicon layer at an extremely low concentration. The sputtering apparatus includes a process chamber having first and second regions, a metal target located inside the process chamber, a target transfer unit moving the metal target and having a first shield for controlling a traveling direction of a metal catalyst discharged from the metal target, and a substrate holder disposed in the second region to be capable of facing the metal target.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: March 31, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park, Yun-Mo Chung, Dong-Hyun Lee, Kil-Won Lee, Jae-Wan Jung, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Byung-Soo So, Jong-Won Hong, Min-Jae Jeong, Heung-Yeol Na, Ivan Maidanchuk, Eu-Gene Kang, Seok-Rak Chang
  • Patent number: 8987723
    Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: March 24, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Jin-Wook Seo, Ki-Yong Lee, Yun-Mo Chung, Jong-Ryuk Park, Tak-Young Lee, Dong-Hyun Lee, Kil-Won Lee, Byung-Soo So, Yong-Duck Son, Seung-Kyu Park, Jae-Wan Jung, Min-Jae Jeong
  • Publication number: 20150001523
    Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 1, 2015
    Inventors: Byoung-Keon PARK, Jong-Ryuk PARK, Yun-Mo CHUNG, Tak-Young LEE, Jin-Wook SEO, Ki-Yong LEE, Min-Jae JEONG, Yong-Duck SON, Byung-Soo SO, Seung-Kyu PARK, Dong-Hyun LEE, Kil-Won LEE, Jae-Wan Jung
  • Publication number: 20140363936
    Abstract: A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.
    Type: Application
    Filed: June 12, 2014
    Publication date: December 11, 2014
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee, Maxim Lisachenko, Bo-Kyung Choi, Dae-Woo Lee, Kil-Won Lee, Dong-Hyun Lee, Jong-Ryuk Park, Ji-Su Ahn, Young-Dae Kim, Heung-Yeol Na, Min-Jae Jeong, Yun-Mo Chung, Jong-Won Hong, Eu-Gene Kang, Seok-RaK Chang, Jae-Wan Jung, Sang-Yon Yoon
  • Patent number: 8894768
    Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-Keon Park, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Heung-Yeol Na, Tae-Hoon Yang, Yun-Mo Chung, Eu-Gene Kang, Seok-Rak Chang, Dong-Hyun Lee, Kil-Won Lee, Jong-Ryuk Park, Bo-Kyung Choi, Won-Bong Baek, Ivan Maidanchuk, Byung-Soo So, Jae-Wan Jung
  • Patent number: 8890165
    Abstract: A method of forming a polycrystalline silicon layer, a thin film transistor (TFT), an organic light emitting diode (OLED) display device having the same, and methods of fabricating the same. The method of forming a polycrystalline silicon layer includes providing a substrate, forming a buffer layer on the substrate, forming an amorphous silicon layer on the buffer layer, forming a groove in the amorphous silicon layer, forming a capping layer on the amorphous silicon layer, forming a metal catalyst layer on the capping layer, and annealing the substrate and crystallizing the amorphous silicon layer into a polycrystalline silicon layer.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: November 18, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hyun Lee, Ki-Yong Lee, Jin-Wook Seo, Tae-Hoon Yang, Maxim Lisachenko, Byoung-Keon Park, Kil-Won Lee, Jae-Wan Jung
  • Publication number: 20140308445
    Abstract: A deposition apparatus, and a canister for the deposition apparatus capable of maintaining a predetermined amount of source material contained in a reactive gas supplied to a deposition chamber when the source material is deposited on a substrate by atomic layer deposition includes a main body, a source storage configured to store a source material, a heater disposed outside the main body, and a first feed controller configured to control the source material supplied to the main body from the source storage.
    Type: Application
    Filed: June 27, 2014
    Publication date: October 16, 2014
    Inventors: Heung-Yeol Na, Ki-Yong Lee, Jin-Wook Seo, Min-Jae Jeong, Jong-Won Hong, Eu-Gene Kang, Seok-Rak Chang, Tae-Hoon Yang, Yun-Mo Chung, Byung-Soo So, Byoung-Keon Park, Ivan Maidanchuk, Dong-Hyun Lee, Kii-Won Lee, Won-Bong Baek, Jong-Ryuk Park, Bo-Kyung Choi, Jae-Wan Jung