Abstract: A controller includes at least one register configured to store a doorbell regarding a submission queue storing at least one request generated by a host, a first cache configured to store data corresponding to a first result of an operation performed in response to the at least one request, a second cache configured to store data corresponding to a second result of an operation performed in response to a read look ahead (RLA) request generated based on the at least one request, and a cache size manager configured to adjust a size of the second cache based on an update cycle of the doorbell and a change of a number of the at least one request corresponding to the doorbell.

Abstract: A storage device, a controller, and a method for performing global wear-leveling may count write counts of a plurality of respective cores in each of a plurality of logical areas each including logical block address groups of the plurality of cores, determine, on the basis of degradation counts of the plurality of cores, a first core and a second core for which data swap is to be performed, determine a target logical area among the plurality of logical areas on the basis of a write count of the first core and a write count of the second core, and perform data swap between a first logical block address group of the first core included in the target logical area and a second logical block address group of the second core included in the target logical area.

Abstract: A storage device may generate mapping information between a plurality of memory regions and one or more namespaces. The storage device may record information on empty memory regions among the plurality of memory regions in an empty table, and may determine empty memory regions to be mapped to a target namespace among the empty memory regions recorded in the empty table.

Abstract: Storage devices, methods of operating storage devices, and computing systems including storage devices are disclosed. In an embodiment, a storage device may include a plurality of memory devices and a memory controller for controlling the plurality of memory devices to process a request of a host in accessing plurality of memory devices, wherein the memory controller is configured to allocate the plurality of memory devices to a plurality of functions, allocate a plurality of request slots allowed to process the request per unit time for each of the plurality of functions, determine idle request slots other than active request slots being used to process the request among the plurality of request slots allocated to each of the plurality of functions, and control an internal operation of the plurality of memory devices based on at least one target function including the idle request slots among the plurality of functions.

Abstract: A controller includes at least one register configured to store a doorbell regarding a submission queue storing at least one request generated by a host, a first cache configured to store data corresponding to a first result of an operation performed in response to the at least one request, a second cache configured to store data corresponding to a second result of an operation performed in response to a read look ahead (RLA) request generated based on the at least one request, and a cache size manager configured to adjust a size of the second cache based on an update cycle of the doorbell and a change of a number of the at least one request corresponding to the doorbell.

Abstract: A storage device, a controller, and a method for performing global wear-leveling may count write counts of a plurality of respective cores in each of a plurality of logical areas each including logical block address groups of the plurality of cores, determine, on the basis of degradation counts of the plurality of cores, a first core and a second core for which data swap is to be performed, determine a target logical area among the plurality of logical areas on the basis of a write count of the first core and a write count of the second core, and perform data swap between a first logical block address group of the first core included in the target logical area and a second logical block address group of the second core included in the target logical area.

Abstract: Storage devices, methods of operating storage devices, and computing systems including storage devices are disclosed. In an embodiment, a storage device may include a plurality of memory devices and a memory controller for controlling the plurality of memory devices to process a request of a host in accessing plurality of memory devices, wherein the memory controller is configured to allocate the plurality of memory devices to a plurality of functions, allocate a plurality of request slots allowed to process the request per unit time for each of the plurality of functions, determine idle request slots other than active request slots being used to process the request among the plurality of request slots allocated to each of the plurality of functions, and control an internal operation of the plurality of memory devices based on at least one target function including the idle request slots among the plurality of functions.

Abstract: The storage device may receive a condition for a down-time mode from the host. The storage device may cache, when the condition for the down-time mode is determined as satisfied, at least a part of update data units in the update cache. The storage device may process a read command received from the host in the down-time mode based on update data units cached in the update cache.

Abstract: A memory controller capable of improving the performance of a read operation may include: a read command generator for generating read commands instructing a memory device to read, in advance, data to be read-requested from a host; a cache memory for storing data read from the memory device according to the read commands; a read operation controller for receiving, from the cache memory, data corresponding to a read request of the host in response to the read request, and outputting the received data to the host; and a cache memory size controller for controlling a size of the cache memory, based on a size of an area assigned for prefetching data in the data stored in the cache memory and a size of the data corresponding to the read request.

Abstract: A data storage system includes a controller comprising pipelined multiple processors. The controller is configured to: generate plural instructions having dependency based on a command, input from an external device, for controlling at least one storage device to perform an operation corresponding to the command; allocate the plural instructions to the pipelined multiple processors in stages; and reallocate, when a number of second instructions allocated to a second processor of the pipelined multiple processors becomes a first threshold or greater, at least one of the second instructions to a first processor of the multiple processors.

Abstract: The storage device may receive a condition for a down-time mode from the host. The storage device may cache, when the condition for the down-time mode is determined as satisfied, at least a part of update data units in the update cache. The storage device may process a read command received from the host in the down-time mode based on update data units cached in the update cache.

Abstract: A controller includes at least one register configured to store a doorbell regarding a submission queue storing at least one request generated by a host, a first cache configured to store data corresponding to a first result of an operation performed in response to the at least one request, a second cache configured to store data corresponding to a second result of an operation performed in response to a read look ahead (RLA) request generated based on the at least one request, and a cache size manager configured to adjust a size of the second cache based on an update cycle of the doorbell and a change of a number of the at least one request corresponding to the doorbell.

Abstract: Provided herein may be a storage device, an electronic device including the storage device, and an operating method thereof. The storage device may include a memory controller, the memory controller including a plurality of functions configured to be identified as a plurality of storage devices logically separated from each other by an external host, a resource manager configured to store characteristic values and resource values respectively corresponding to the plurality of functions, and a command processor configured to, when commands respectively corresponding to the plurality of functions are received from the external host, preferentially process a command corresponding to a first function having lowest resource value, among the plurality of functions, based on the resource values, and update a resource value of the first function by accumulating an characteristic value of the first function in the resource value of the first function.

Abstract: A storage device may generate mapping information between a plurality of memory regions and one or more namespaces. The storage device may record information on empty memory regions among the plurality of memory regions in an empty table, and may determine empty memory regions to be mapped to a target namespace among the empty memory regions recorded in the empty table.

Abstract: A storage device, a controller, and a method for performing global wear-leveling may count write counts of a plurality of respective cores in each of a plurality of logical areas each including logical block address groups of the plurality of cores, determine, on the basis of degradation counts of the plurality of cores, a first core and a second core for which data swap is to be performed, determine a target logical area among the plurality of logical areas on the basis of a write count of the first core and a write count of the second core, and perform data swap between a first logical block address group of the first core included in the target logical area and a second logical block address group of the second core included in the target logical area.

Abstract: Provided herein may be a storage device, an electronic device including the storage device, and an operating method thereof. The storage device may include a memory controller, the memory controller including a plurality of functions configured to be identified as a plurality of storage devices logically separated from each other by an external host, a resource manager configured to store characteristic values and resource values respectively corresponding to the plurality of functions, and a command processor configured to, when commands respectively corresponding to the plurality of functions are received from the external host, preferentially process a command corresponding to a first function having lowest resource value, among the plurality of functions, based on the resource values, and update a resource value of the first function by accumulating an characteristic value of the first function in the resource value of the first function.

Abstract: A controller configures a map table including a map entry associating different address schemes with each other. The controller is configured, for performing map table configuration, to find a target map entry among previous map entries in the map table, merge the current map entry into the target map entry to generate a merged map entry when the target map entry is found, and store the merged map entry in the map table. The target map entry and a current map entry include at least some information which is overlapped.

Abstract: A controller configures a map table including a map entry associating different address schemes with each other. The controller is configured, for performing map table configuration, to find a target map entry among previous map entries in the map table, merge the current map entry into the target map entry to generate a merged map entry when the target map entry is found, and store the merged map entry in the map table. The target map entry and a current map entry include at least some information which is overlapped.