Patents by Inventor Byoung-Moon Yoon

Byoung-Moon Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050028842
    Abstract: In one embodiment, an apparatus includes a cleaning bath for containing a cleaning solution, one or more substrate holders configured to support the substrate in the cleaning solution, means for removing the substrate from the cleaning solution, and means for releasing the one or more substrate holders from the substrate while the one or more substrate holders are immersed in the cleaning solution. Therefore, the formation of water spots or chemical stains on a substrate can be prevented.
    Type: Application
    Filed: June 29, 2004
    Publication date: February 10, 2005
    Inventors: Tae-Hyun Kim, Kyung-Hyun Kim, Byoung-Moon Yoon, In-Seak Hwang
  • Publication number: 20050026452
    Abstract: A wafer having a dielectric layer and an electrode partially protruding from the top surface of the dielectric layer is provided. An etchant or chemical solution is applied to the dielectric layer and bubbles in the etchant are prevented from adhering to the electrode. In one embodiment, prior to etching, the protruding portion is covered with a buffer layer to prevent bubbles in the etchant from adhering to the electrode. Thus, the etchant can etch the dielectric layers without being blocked by bubbles included therein.
    Type: Application
    Filed: May 26, 2004
    Publication date: February 3, 2005
    Inventors: Won-Jun Lee, Byoung-Moon Yoon, In-Seak Hwang, Yong-Sun Ko
  • Publication number: 20050023634
    Abstract: Provided is a method of fabricating a shallow trench isolation (STI) structure having a high aspect ratio and improved insulating properties. The exemplary method includes filling a shallow trench isolation region opening with an undoped polysilicon layer, removing an upper portion of the undoped polysilicon layer to form a second opening having a reduced aspect ratio relative to the original opening and filling the second opening with an insulating material to complete the STI structure. Additional protective layers including silicon oxide, silicon nitride and/or a capping layer may be provided on the sidewalls of the opening before depositing the undoped polysilicon.
    Type: Application
    Filed: June 8, 2004
    Publication date: February 3, 2005
    Inventors: Byoung-Moon Yoon, Min-Jin Lee, Yong-Sun Ko, In-Seak Hwang, Won-Jun Lee
  • Patent number: 6843257
    Abstract: Embodiments of the invention include a megasonic energy cleaning apparatus that has the ability to rotate the wafer to be cleaned, as well as rotate the cleaning probe during the cleaning process. Rotating the cleaning probe while the wafer is being cleaned is effective to increase the cleaning action of the apparatus while also minimizing damage to the wafer. Curved grooves, such as a spiral groove, can be etched into the cleaning probe to minimize forming harmful waves that could potentially cause damage to the wafer surface or to structures already made on the surface. Using a cleaning probe having a curved groove while also rotating the cleaning probe effectively cleans particles from a wafer while also limiting damage to the surface of the wafer.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: January 18, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-Jun Yeo, Kyung-Hyun Kim, Jeong-Lim Nam, Byoung-Moon Yoon, Hyun-Ho Cho, Sang-Rok Hah
  • Patent number: 6831012
    Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: December 14, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Keun Kang, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon
  • Publication number: 20040242015
    Abstract: Etching compositions for selectively etching silicon germanium faster than other silicon containing compositions may be produced by controlling the ratios of de-ionized water used in the etching compositions with respect to the amounts of nitric acid, hydrofluoric acid, and/or acetic acid. Methods for selectively etching silicon germanium without damaging a silicon substrate or a silicon layer are possible using the etching compositions.
    Type: Application
    Filed: March 4, 2004
    Publication date: December 2, 2004
    Inventors: Kyoung-Chul Kim, Dong-Gun Park, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon, Sung-Min Kim, Jeong-Dong Choe
  • Publication number: 20040231711
    Abstract: A spin chuck for wafer processing includes: a rotary unit having a top surface adapted to receive and rotate a wafer; a plurality of wafer gripping units mounted on the rotary unit; a set of first gripping members; and a set of second gripping members. Each of the wafer gripping units has at least one of a first gripping member and a second gripping member that are configured to engage a wafer. The wafer gripping units are movable between first and second gripping positions, wherein in the first gripping position, the first gripping members are positioned to engage a wafer received on the rotary unit and the second gripping members are spaced apart from the wafer, and in the second gripping position, the second gripping members are positioned to engage the wafer, and the first gripping members are spaced apart from the wafer.
    Type: Application
    Filed: May 11, 2004
    Publication date: November 25, 2004
    Inventors: Cheol-woo Park, Yong-sun Ko, In-Seak Hwang, Byoung-moon Yoon
  • Publication number: 20040198007
    Abstract: The present invention provides a semiconductor device having a metal silicide layer and a method for forming the metal silicide layer, the semiconductor device having a metal silicide-semiconductor contact structure, wherein the semiconductor device includes a substrate, an insulation layer with an opening, in which a metal silicide layer is formed using a native metal silicide with a first phase and a second phase, upon which a conductive layer is formed. The second phase has a first stoichiometrical composition ratio different from a second stoichiometrical composition ratio of the first phase. A reaction between the metal silicide layer of the first phase and the silicon results in the metal silicide layer of the second phase having high phase stability and low resistance.
    Type: Application
    Filed: April 14, 2004
    Publication date: October 7, 2004
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: Wong-Sang Song, Jeong-Hwan Yang, In-Sun Park, Byoung-Moon Yoon
  • Patent number: 6740587
    Abstract: The present invention provides a semiconductor device having a metal suicide layer and a method for forming the metal silicide layer, the semiconductor device having a metal silicide-semiconductor contact structure, wherein the semiconductor device includes a substrate, an insulation layer with an opening, in which a metal silicide layer is formed using a native metal silicide with a first phase and a second phase, upon which a conductive layer is formed. The second phase has a first stoichiometrical composition ratio different from a second stoichiometrical composition ratio of the first phase. A reaction between the metal silicide layer of the first phase and the silicon results in the metal silicide layer of the second phase having high phase stability and low resistance.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: May 25, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Sang Song, Jeong-Hwan Yang, In-Sun Park, Byoung-Moon Yoon
  • Publication number: 20040097389
    Abstract: Cleaning solutions for integrated circuit devices and methods of cleaning integrated circuit devices using the same are disclosed. The cleaning solution includes about 30% aqueous ammonia solution, acetic acid by a volume percent higher then a volume percent of the aqueous ammonia solution, and deionized water by a volume percent higher then the volume percent of the acetic acid. Additionally, disclosed are methods wherein the cleaning solution is formed on integrated circuit substrates having an exposed metal pattern formed thereon, and further providing mega-sonic energy to the film of the cleaning solution.
    Type: Application
    Filed: September 4, 2003
    Publication date: May 20, 2004
    Inventors: In-Joon Yeo, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon, Dae-Hyuk Chung, Kyung-Hyun Kim
  • Publication number: 20040038839
    Abstract: Disclosed is an organic stripping composition and a method of etching a semiconductor device in which the generation of an Si pitting phenomenon can be prevented. The composition includes a compound including a hydroxyl ion (OH−), a compound including a fluorine ion (F−) and a sufficient amount of an oxidizing agent to control the pH of the composition within the range of from about 6.5 to about 8.0. The method includes dry ethcing an oxide by a dry etching using a plasma, and then ashing the etched oxide using an ashing process to remove an organic material. The method further includes supplying the organic stripping composition to remove residues including any residual organic material, a metal polymer, and an oxide type polymer. The stripping composition is stable onto various metals and does not induce the Si pitting phenomenon.
    Type: Application
    Filed: August 6, 2003
    Publication date: February 26, 2004
    Inventors: Tae-Hyun Kim, Byoung-Moon Yoon, Kyung-Hyun Kim, Chang-Lyong Song, Yong-Sun Ko
  • Publication number: 20040025911
    Abstract: An apparatus for cleaning a semiconductor substrate has a chuck for rotatably supporting the semiconductor substrate, and a horizontally movable probe for applying ultrasonic vibrations uniformly to cleaning solution supplied onto an upper surface of the semiconductor substrate. The probe makes contact with the cleaning solution supplied and extends vertically from the upper surface of the substrate. The cross-sectional area of the probe gradually increases in a direction towards the semiconductor substrate so that the ultrasonic vibrations are widely distributed to the cleaning solution. The lower surface of the probe has surface features that act to disperse a reflected wavefront of the vibrational energy. Thus, patterns formed on the semiconductor substrate will not be damaged by the ultrasonic vibrations.
    Type: Application
    Filed: March 24, 2003
    Publication date: February 12, 2004
    Inventors: In-Ju Yeo, Byoung-Moon Yoon, Yong-Sun Ko, Kyung-Hyun Kim, Chang-Lyong Song
  • Publication number: 20040029378
    Abstract: After a silicidation blocking pattern is formed on a substrate including silicon, the silicidation blocking pattern is hardened by a thermal annealing process. The substrate is rinsed to remove a native oxide film formed on the substrate, and then a silicide film is formed on a portion of the substrate exposed by the silicidation blocking pattern. The silicide film can thus be formed in an exact portion of the substrate, and the substrate is not damaged during rinsing.
    Type: Application
    Filed: May 28, 2003
    Publication date: February 12, 2004
    Inventors: Dae-Keun Kang, Yong-Sun Ko, In-Seak Hwang, Byoung-Moon Yoon
  • Publication number: 20030200986
    Abstract: Embodiments of the invention include a megasonic energy cleaning apparatus that has the ability to rotate the wafer to be cleaned, as well as rotate the cleaning probe during the cleaning process. Rotating the cleaning probe while the wafer is being cleaned is effective to increase the cleaning action of the apparatus while also minimizing damage to the wafer. Curved grooves, such as a spiral groove, can be etched into the cleaning probe to minimize forming harmful waves that could potentially cause damage to the wafer surface or to structures already made on the surface. Using a cleaning probe having a curved groove while also rotating the cleaning probe effectively cleans particles from a wafer while also limiting damage to the surface of the wafer.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: In-Jun Yeo, Kyung-Hyun Kim, Jeong-Lim Nam, Byoung-Moon Yoon, Hyun-Ho Cho, Sang-Rok Hah
  • Publication number: 20030192571
    Abstract: The apparatus for cleaning a wafer includes an energy concentration relieving member positioned at the side of the wafer. An elongated portion of a probe extends over and substantially parallel to the wafer surface. A vibrator is attached to a rear end of the probe for vibrating the probe such that the elongated portion transfers acoustic vibrational energy to the wafer and dislodges debris.
    Type: Application
    Filed: March 10, 2003
    Publication date: October 16, 2003
    Inventors: In-Jun Yeo, Byoung-Moon Yoon, Kyung-Hyun Kim, Sang-Rok Hah, Jeong-Lim Nam, Hyun-Ho Jo
  • Publication number: 20030178049
    Abstract: A megasonic cleaning apparatus is provided for removing contamination particles on a wafer. The megasonic cleaning apparatus includes a piezoelectric transducer and an energy transfer rod. The piezoelectric transducer is for generating megasonic energy. The energy transfer rod installed over the wafer along a radial direction of the wafer is for distributing the megasonic energy to cleaning solution over the wafer and for vibrating the cleaning solution. The energy transfer rod is shaped and sized to uniformly distribute energy in the radial direction of the wafer through the cleaning solution to remove the contamination particles from the wafer.
    Type: Application
    Filed: August 12, 2002
    Publication date: September 25, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Byoung-moon Yoon, In-jun Yeo, Sang-rok Hah, Kyung-hyun Kim, Hyun-ho Jo, Jeong-lim Nam
  • Publication number: 20030160208
    Abstract: Methods for the removal of anti-reflective layers during fabrication of integrated circuits are disclosed. In particular, an anti-reflective pattern or layer can be removed using a solution that includes a fluorine containing compound, an oxidant, and water. The fluorine containing compound in the solution can be hydrogen fluorine containing compound. Preferably, the oxidant in the solution is H2O2. The oxidant in the solution can also be ozone water. Related compositions are also disclosed.
    Type: Application
    Filed: March 24, 2003
    Publication date: August 28, 2003
    Inventors: In-Jun Yeo, Byoung-Moon Yoon
  • Patent number: 6562727
    Abstract: Methods for the removal of anti-reflective layers during fabrication of integrated circuits are disclosed. In particular, an anti-reflective pattern or layer can be removed using a solution that includes a fluorine containing compound, an oxidant, and water. The fluorine containing compound in the solution can be hydrogen fluorine containing compound. Preferably, the oxidant in the solution is H2O2. The oxidant in the solution can also be ozone water. Related compositions are also disclosed.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: May 13, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-jun Yeo, Byoung-moon Yoon
  • Patent number: 6489201
    Abstract: Disclosed is a method for manufacturing a semiconductor device. A polysilicon layer is deposited on an oxide layer having a contact hole or an opening. The polysilicon layer is etched-back such that the polysilicon layer remains only in the contact hole or in the opening. A cleaning process is performed using a first etchant having a similar etching rate with respect to polysilicon and oxide, thereby removing a damaged layer which is created on a surface of the oxide layer when the etch back process is carried out with respect to the polysilicon layer. An insulating layer is deposited on the resulting structure. After the etch-back process is carried out, a cleaning process using SC-1 solution is performed so as to remove the damaged layer formed on a surface of a lower insulating layer. A polysilicon based plate-shaped defect can be prevented and a lateral undercut of an upper insulating layer can be reduced when a subsequent HF cleaning process is carried out.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: December 3, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Byoung-Moon Yoon
  • Publication number: 20020090784
    Abstract: Disclosed is a method for manufacturing a semiconductor device. A polysilicon layer is deposited on an oxide layer having a contact hole or an opening. The polysilicon layer is etched-back such that the polysilicon layer remains only in the contact hole or in the opening. A cleaning process is performed using a first etchant having a similar etching rate with respect to polysilicon and oxide, thereby removing a damaged layer which is created on a surface of the oxide layer when the etch back process is carried out with respect to the polysilicon layer. An insulating layer is deposited on the resulting structure. After the etch-back process is carried out, a cleaning process using SC-1 solution is performed so as to remove the damaged layer formed on a surface of a lower insulating layer. A polysilicon based plate-shaped defect can be prevented and a lateral undercut of an upper insulating layer can be reduced when a subsequent HF cleaning process is carried out.
    Type: Application
    Filed: December 13, 2001
    Publication date: July 11, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Byoung-Moon Yoon