Abstract: The present invention relates to a chip-size package (CSP) semiconductor, which comprises a chip having a bonding pad formed at the center portion thereof; a substrate for seating and mounting the chip thereon, which has a predetermined shaped slot formed at the center portion thereof and is formed with a signal circuit pattern on, at least, one surface thereof; an adhesive means inserted between the chip and the substrate for attaching and fixing the chip to the upper surface of the substrate so that the bonding pad of the chip may arrange above the slot; a support and protection means for protecting and supporting the chip and the substrate; and the bonding pad of the chip and the signal circuit pattern of the substrate are electrically interconnected by wire, thus forming internal circuit, thus mass-producing at low price, easily radiated its heat occurring during the operation, thus extending its durability, and improving a reliance of the package and shortening the length of the process.