Abstract: A semiconductor package includes a first semiconductor chip having a first face and a second face opposite thereto. The first semiconductor chip includes a first wiring layer having a surface that forms the first face. A second semiconductor chip disposed on the first face of the first semiconductor chip includes a second wiring layer directly contacting the first wiring layer. A first mold layer is disposed on one lateral side of the first semiconductor chip and directly contacts the second wiring layer. A first via penetrates the first mold layer. A width of the first wiring layer and the first semiconductor chip in a horizontal direction are substantially the same. A width of the second wiring layer and the second semiconductor chip in the horizontal direction are substantially the same. A height of the first via and the first semiconductor chip in the vertical direction are substantially the same.

Abstract: A semiconductor package includes a first semiconductor chip having a first face and a second face opposite thereto. The first semiconductor chip includes a first wiring layer having a surface that forms the first face. A second semiconductor chip disposed on the first face of the first semiconductor chip includes a second wiring layer directly contacting the first wiring layer. A first mold layer is disposed on one lateral side of the first semiconductor chip and directly contacts the second wiring layer. A first via penetrates the first mold layer. A width of the first wiring layer and the first semiconductor chip in a horizontal direction are substantially the same. A width of the second wiring layer and the second semiconductor chip in the horizontal direction are substantially the same. A height of the first via and the first semiconductor chip in the vertical direction are substantially the same.

Abstract: There is provided a semiconductor device, enhanced with process capability and reliability by way of flow control of an adhesive material to fix semiconductor chips. The semiconductor device includes a first semiconductor chip including a first surface and a second surface opposite to each other, a flow regulating structure formed at the first surface of the first semiconductor chip, and a second semiconductor chip mounted on the first surface of the first semiconductor chip. The second semiconductor chip overlaps at least a portion of the flow regulating structure.

Abstract: There is provided a semiconductor device, enhanced with process capability and reliability by way of flow control of an adhesive material to fix semiconductor chips. The semiconductor device includes a first semiconductor chip including a first surface and a second surface opposite to each other, a flow regulating structure formed at the first surface of the first semiconductor chip, and a second semiconductor chip mounted on the first surface of the first semiconductor chip. The second semiconductor chip overlaps at least a portion of the flow regulating structure.

Abstract: A method of manufacturing a semiconductor device include preparing an initial substrate including an edge region and a central region in which circuit patterns are formed, forming a reforming region in the edge region of the initial substrate, grinding the initial substrate to form a substrate, and cutting the substrate to form a semiconductor chip including each of the circuit patterns. A crystal structure of the reforming region is different from that of the initial substrate.

Abstract: A semiconductor device and a method of fabricating the same includes providing a first semiconductor chip which has first connection terminals, providing a second semiconductor chip which comprises top and bottom surfaces facing each other and has second connection terminals and a film-type first underfill material formed on the bottom surface thereof, bonding the first semiconductor chip to a mounting substrate by using the first connection terminals, bonding the first semiconductor chip and the second semiconductor chip by using the first underfill material, and forming a second underfill material which fills a space between the mounting substrate and the first semiconductor chip and covers side surfaces of the first semiconductor chip and at least part of side surfaces of the second semiconductor chip.

Abstract: A method of manufacturing a semiconductor device include preparing an initial substrate including an edge region and a central region in which circuit patterns are formed, forming a reforming region in the edge region of the initial substrate, grinding the initial substrate to form a substrate, and cutting the substrate to form a semiconductor chip including each of the circuit patterns. A crystal structure of the reforming region is different from that of the initial substrate.

Abstract: A semiconductor device and a method of fabricating the same includes providing a first semiconductor chip which has first connection terminals, providing a second semiconductor chip which comprises top and bottom surfaces facing each other and has second connection terminals and a film-type first underfill material formed on the bottom surface thereof, bonding the first semiconductor chip to a mounting substrate by using the first connection terminals, bonding the first semiconductor chip and the second semiconductor chip by using the first underfill material, and forming a second underfill material which fills a space between the mounting substrate and the first semiconductor chip and covers side surfaces of the first semiconductor chip and at least part of side surfaces of the second semiconductor chip.

Abstract: Provided is a method of fabricating a multi-chip stack package. The method includes preparing single-bodied lower chips having a single-bodied lower chip substrate having a first surface and a second surface disposed opposite the first surface, bonding unit package substrates onto the first surface of the single-bodied lower chip substrate to form a single-bodied substrate-chip bonding structure, separating the single-bodied substrate-chip bonding structure into a plurality of unit substrate-chip bonding structures, preparing single-bodied upper chips having a single-bodied upper chip substrate, bonding the plurality of unit substrate-chip bonding structures onto a first surface of the single-bodied upper chip substrate to form a single-bodied semiconductor chip stack structure, and separating the single-bodied semiconductor chip stack structure into a plurality of unit semiconductor chip stack structures.

Abstract: Provided is a method of fabricating a multi-chip stack package. The method includes preparing single-bodied lower chips having a single-bodied lower chip substrate having a first surface and a second surface disposed opposite the first surface, bonding unit package substrates onto the first surface of the single-bodied lower chip substrate to form a single-bodied substrate-chip bonding structure, separating the single-bodied substrate-chip bonding structure into a plurality of unit substrate-chip bonding structures, preparing single-bodied upper chips having a single-bodied upper chip substrate, bonding the plurality of unit substrate-chip bonding structures onto a first surface of the single-bodied upper chip substrate to form a single-bodied semiconductor chip stack structure, and separating the single-bodied semiconductor chip stack structure into a plurality of unit semiconductor chip stack structures.