Abstract: An address decoder for repair of a memory device including a conductive line being applied with a desired voltage and a plurality of repair links connected to the conductive line, the repair links being arranged adjacent to each other or one another by a predetermined number at their predetermined portions so that one or more of them can selectively be blown by once scanning of a laser beam. According to the invention, the number of times that the links are blown by the laser beam is significantly reduced, resulting in a reduction in the working time required in repairing a failed cell column using the laser beam. This has the effect of enhancing the working efficiency and reducing the probability that the repair is failed.

Abstract: A method for aligning a semiconductor chip to be repaired with a repair system and a laser repair target used therefor, The laser repair target comprises at least one basic target adapted to be used in focusing, X-alignment and Y-alignment and shaped into a right-angled triangle and at least one bar type target adapted to be used in Theta-alignment. The laser repair target has selected targets at corners thereof, respectively. Offsets in X-direction and Y-direction are calculated on the basis of respective differences in X-coordinate and Y-coordinate between center X- and Y-coordinates and X- and Y-coordinates in actual scanning. It is possible to reduce the time required for the alignment of semiconductor chip to be repaired, thereby improving the productivity of semiconductor chips and reducing the total area of each semiconductor chip.