Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first bit line structure extending in a first direction, a second bit line structure extending in the first direction and spaced apart from the first bit line structure, a storage contact plug located between the first bit line structure and the second bit line structure, and extending in a second direction perpendicular to the first direction, a first plug insulator located between the first bit line structure and the second bit line structure, and configured to contact a side surface extending in the second direction of the storage contact plug, and a plug isolation pattern located between the first bit line structure and the first plug insulator.

Abstract: Fabricating methods of a semiconductor device are provided. The fabricating methods may include forming a mold layer, forming a catalyst pattern including noble metal on the mold layer and etching the mold layer using the catalyst pattern as a catalyst. Etching the mold layer may include performing a wet etching process.

Abstract: According to example embodiments of inventive concepts, method of forming a semiconductor memory devices includes sequentially forming a first mold layer, a first support layer, a second mold layer, and a second support layer on a substrate, forming lower electrodes penetrating the second support layer, the second mold layer, the first support layer, and the first mold layer on the substrate, patterning the second support layer to form a second support pattern including an opening, removing the second mold layer to expose portions of sidewalls of the lower electrodes, and etching the exposed sidewalls of the lower electrodes.

Abstract: According to example embodiments of inventive concepts, method of forming a semiconductor memory devices includes sequentially forming a first mold layer, a first support layer, a second mold layer, and a second support layer on a substrate, forming lower electrodes penetrating the second support layer, the second mold layer, the first support layer, and the first mold layer on the substrate, patterning the second support layer to form a second support pattern including an opening, removing the second mold layer to expose portions of sidewalls of the lower electrodes, and etching the exposed sidewalls of the lower electrodes.

Abstract: A method of forming a fine pattern includes forming first line mask patterns on a mask layer to extend along a direction, forming second line mask patterns to extend along a diagonal direction with respect to the first line mask patterns, anisotropically etching the mask layer exposed by the first and second line mask patterns to form elliptical openings, and isotropically etching the mask layer provided with the openings to form a mask pattern with enlarged openings.

Abstract: A method of forming fine patterns includes patterning a hard mask layer and a buffer mask layer sequentially stacked on a lower mask layer to form first openings, forming sacrificial patterns filling the first openings and protruding from a top surface of the buffer mask layer, forming a spacer pattern filling a space between two adjacent sacrificial patterns and having gaps each of which exposes a portion of the buffer mask layer between at least three adjacent sacrificial patterns, etching portions of the buffer mask layer exposed by the gaps of the spacer pattern to form enlarged holes, etching portions of the hard mask layer exposed by the enlarged holes to form second openings, and subsequently etching the lower layer using the hard mask layer as an etch mask.

Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first bit line structure extending in a first direction, a second bit line structure extending in the first direction and spaced apart from the first bit line structure, a storage contact plug located between the first bit line structure and the second bit line structure, and extending in a second direction perpendicular to the first direction, a first plug insulator located between the first bit line structure and the second bit line structure, and configured to contact a side surface extending in the second direction of the storage contact plug, and a plug isolation pattern located between the first bit line structure and the first plug insulator.

Abstract: Fabricating methods of a semiconductor device are provided. The fabricating methods may include forming a mold layer, forming a catalyst pattern including noble metal on the mold layer and etching the mold layer using the catalyst pattern as a catalyst. Etching the mold layer may include performing a wet etching process.

Abstract: A method of forming fine patterns includes patterning a hard mask layer and a buffer mask layer sequentially stacked on a lower mask layer to form first openings, forming sacrificial patterns filling the first openings and protruding from a top surface of the buffer mask layer, forming a spacer pattern filling a space between two adjacent sacrificial patterns and having gaps each of which exposes a portion of the buffer mask layer between at least three adjacent sacrificial patterns, etching portions of the buffer mask layer exposed by the gaps of the spacer pattern to form enlarged holes, etching portions of the hard mask layer exposed by the enlarged holes to form second openings, and subsequently etching the lower layer using the hard mask layer as an etch mask.

Abstract: A method of forming a fine pattern includes forming first line mask patterns on a mask layer to extend along a direction, forming second line mask patterns to extend along a diagonal direction with respect to the first line mask patterns, anisotropically etching the mask layer exposed by the first and second line mask patterns to form elliptical openings, and isotropically etching the mask layer provided with the openings to form a mask pattern with enlarged openings.

Abstract: A method of manufacturing a semiconductor device includes forming a bit line on a substrate comprising an active region; forming an interlayer insulating layer covering the bit line on the substrate; forming a first hole at a location of the active region through the interlayer insulating layer; forming a dummy contact layer by filling the first hole; forming a mold layer on the interlayer insulating layer and the dummy contact layer; forming a second hole at a location of the dummy contact layer through the mold layer; removing the dummy contact layer in the first hole through the second hole; forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole; and forming a lower electrode on internal surfaces of the first hole and the second hole.

Abstract: The present disclosure describes methods of fabricating a semiconductor device. An exemplary method includes forming a metal pattern on a substrate and etching the metal pattern using an etchant including at least an alkaline solution and an oxidant to form a metal electrode, where at least a portion of the surface of the metal electrode is uneven.

Abstract: According to example embodiments of inventive concepts, method of forming a semiconductor memory devices includes sequentially forming a first mold layer, a first support layer, a second mold layer, and a second support layer on a substrate, forming lower electrodes penetrating the second support layer, the second mold layer, the first support layer, and the first mold layer on the substrate, patterning the second support layer to form a second support pattern including an opening, removing the second mold layer to expose portions of sidewalls of the lower electrodes, and etching the exposed sidewalls of the lower electrodes.

Abstract: A method of manufacturing a semiconductor device includes forming a bit line on a substrate comprising an active region; forming an interlayer insulating layer covering the bit line on the substrate; forming a first hole at a location of the active region through the interlayer insulating layer; forming a dummy contact layer by filling the first hole; forming a mold layer on the interlayer insulating layer and the dummy contact layer; forming a second hole at a location of the dummy contact layer through the mold layer; removing the dummy contact layer in the first hole through the second hole; forming an epitaxial layer on a portion of the active region, which is exposed at a lower surface of the first hole; and forming a lower electrode on internal surfaces of the first hole and the second hole.

Abstract: The present disclosure describes methods of fabricating a semiconductor device. An exemplary method includes forming a metal pattern on a substrate and etching the metal pattern using an etchant including at least an alkaline solution and an oxidant to form a metal electrode, where at least a portion of the surface of the metal electrode is uneven.

Abstract: In a method of removing a photoresist pattern, a photoresist pattern may be formed on an object layer. Impurities may be implanted into the object layer by a first ion implantation process employing the first photoresist pattern as a first ion implantation mask. The photoresist pattern hardened by the first ion implantation process may be transformed into a first water-soluble photoresist pattern. The water-soluble photoresist pattern may be removed from the object layer.