Patents by Inventor Byoungwon Choe

Byoungwon Choe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11562213
    Abstract: Logic may reduce the size of runtime memory for deep neural network inference computations. Logic may determine, for two or more stages of a neural network, a count of shared block allocations, or shared memory block allocations, that concurrently exist during execution of the two or more stages. Logic may compare counts of the shared block allocations to determine a maximum count of the counts. Logic may reduce inference computation time for deep neural network inference computations. Logic may determine a size for each of the shared block allocations of the count of shared memory block allocations, to accommodate data to store in a shared memory during execution of the two or more stages of the cascaded neural network. Logic may determine a batch size per stage of the two or more stages of a cascaded neural network based on a lack interdependencies between input data.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: January 24, 2023
    Assignee: INTEL CORPORATION
    Inventors: Byoungwon Choe, Kwangwoong Park, Seokyong Byun
  • Publication number: 20220207375
    Abstract: Systems and methods are provided that tune a convolutional neural network (CNN) to increase both its accuracy and computational efficiency. In some examples, a computing device storing the CNN includes a CNN tuner that is a hardware and/or software component that is configured to execute a tuning process on the CNN. When executing according to this configuration, the CNN tuner iteratively processes the CNN layer by layer to compress and prune selected layers. In so doing, the CNN tuner identifies and removes links and neurons that are superfluous or detrimental to the accuracy of the CNN.
    Type: Application
    Filed: January 10, 2022
    Publication date: June 30, 2022
    Inventors: Seok-Yong BYUN, Byungseok ROH, Minje PARK, Byoungwon CHOE
  • Publication number: 20190087729
    Abstract: Systems and methods are provided that tune a convolutional neural network (CNN) to increase both its accuracy and computational efficiency. In some examples, a computing device storing the CNN includes a CNN tuner that is a hardware and/or software component that is configured to execute a tuning process on the CNN. When executing according to this configuration, the CNN tuner iteratively processes the CNN layer by layer to compress and prune selected layers. In so doing, the CNN tuner identifies and removes links and neurons that are superfluous or detrimental to the accuracy of the CNN.
    Type: Application
    Filed: September 18, 2017
    Publication date: March 21, 2019
    Applicant: Intel Corporation
    Inventors: Seok-Yong Byun, Byungseok Roh, Minje Park, Byoungwon Choe
  • Publication number: 20190042925
    Abstract: Logic may reduce the size of runtime memory for deep neural network inference computations. Logic may determine, for two or more stages of a neural network, a count of shared block allocations, or shared memory block allocations, that concurrently exist during execution of the two or more stages. Logic may compare counts of the shared block allocations to determine a maximum count of the counts. Logic may reduce inference computation time for deep neural network inference computations. Logic may determine a size for each of the shared block allocations of the count of shared memory block allocations, to accommodate data to store in a shared memory during execution of the two or more stages of the cascaded neural network. Logic may determine a batch size per stage of the two or more stages of a cascaded neural network based on a lack interdependencies between input data.
    Type: Application
    Filed: April 17, 2018
    Publication date: February 7, 2019
    Applicant: INTEL CORPORATION
    Inventors: Byoungwon Choe, Kwangwoong Park, Seokyong Byun
  • Patent number: 7418371
    Abstract: A method for graphical hairstyle generation presents an interactive technique that produces static hairstyles by generating individual hair strands of the desired shape and color, subject to the presence of gravity and collisions. A variety of hairstyles can be generated by adjusting the wisp parameters while the deformation is solved efficiently accounting for the effects of gravity and collisions. Wisps are generated employing statistical approaches. As for hair deformation, a method is used based on physical simulation concepts but is simplified to efficiently solve the static shape of hair. On top of the statistical wisp model and the deformation solver, a constraint-based styler models artificial features that oppose the natural flow of hair under gravity and hair elasticity, such as a hairpin. Our technique spans a wider range of human hairstyles than previously proposed methods, and the styles generated by this technique are pretty realistic.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: August 26, 2008
    Assignee: Seoul National University Industry Foundation
    Inventors: Byoungwon Choe, Hyeong-Seok Ko
  • Publication number: 20060224366
    Abstract: A method for graphical hairstyle generation presents an interactive technique that produces static hairstyles by generating individual hair strands of the desired shape and color, subject to the presence of gravity and collisions. A variety of hairstyles can be generated by adjusting the wisp parameters while the deformation is solved efficiently accounting for the effects of gravity and collisions. Wisps are generated employing statistical approaches. As for hair deformation, a method is used based on physical simulation concepts but is simplified to efficiently solve the static shape of hair. On top of the statistical wisp model and the deformation solver, a constraint-based styler models artificial features that oppose the natural flow of hair under gravity and hair elasticity, such as a hairpin. Our technique spans a wider range of human hairstyles than previously proposed methods, and the styles generated by this technique are pretty realistic.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 5, 2006
    Inventors: Byoungwon Choe, Hyeong-Seok Ko