Abstract: A separator assembly for a fuel cell and a fuel cell stack including the same, is uniformly capable of forming a surface pressure of a region where a reaction gas flows when a stack is stacked by adjusting a height and shape of a gasket line for each region in which the reaction gas flows.

Abstract: A battery pack includes a battery module that houses battery cells and discharges gas generated from the battery cells; a pack housing that houses the battery module and is provided with an outlet port for discharging gas discharged from the battery module at one surface thereof; and a venting member that covers the outlet port at an outer surface of the pack housing, couples to the outer surface of the pack housing, and discharges gas inside the pack housing. The venting member is detachably coupled to the outer surface of the pack housing.

Abstract: Provided is a static random-access memory (SRAM) device.

Abstract: A battery pack of the present disclosure includes a lower pack frame on which a plurality of battery modules are mounted; and an upper pack frame located on an upper part of the plurality of battery modules, wherein the lower pack frame includes a bottom part in contact with a lower surface of the plurality of battery modules and a frame part in contact with at least one side surface of at least one of the plurality of battery modules, wherein the frame part comprises a side surface frame extending from an edge of the bottom part toward the upper part, and an inner frame located inside the side surface frame, wherein the inner frame includes at least one venting hole that penetrates an outer surface of the inner frame, and wherein the inner frame serves as a path through which a gas generated in the at least one of the plurality of battery modules moves.

Abstract: A battery pack includes a battery module including a plurality of battery cells, a pack frame that houses the battery module, a pack coolant pipe assembly that is connected to the battery module, and a pack coolant pipe housing that houses the pack coolant pipe assembly therein and includes a lower part configurable between an open position and a closed position.

Abstract: A battery pack according to one embodiment of the present disclosure includes a battery module that includes a battery cell stack in which a plurality of battery cells are stacked, a module frame that houses the battery cell stack and a heat sink located below the module frame; a pack refrigerant pipe through which a refrigerant flows; a cooling port that is connected to a through hole formed in the heat sink; and a cooling connector that connects the pack refrigerant pipe and the cooling port, wherein the cooling port includes an inclination part formed on an outer peripheral surface of the cooling port, wherein a width in a horizontal direction of the inclination part becomes narrowed as it goes in the direction in which the cooling connector is located, and wherein a ring-shaped sealing member is located between the inclination part and the cooling connector.

Abstract: Disclosed is a spike neural network circuit including a synaptic circuit including synapses arranged in rows and columns, an axon circuit that generates a first input spike signal to be provided to a first row among the rows, and a second input spike signal to be provided to a second row among the rows, an input spike detecting circuit that generates an enable signal when detecting a pulse from at least one of the first input spike signal and the second input spike signal, and a first neuron circuit that compares a voltage level of a first accumulated signal, which is output from a first column among the columns, with a threshold voltage level in response to the enable signal, and outputs a first output spike signal when the voltage level of the first accumulated signal exceeds the threshold voltage level.

Abstract: Disclosed is a spike neural network circuit including a weight storage that receives an input spike signal and outputs data based on a weight, a charge sharing synaptic circuit that generates a synaptic voltage based on the output data, a switched capacitor circuit that naturally discharges the generated synaptic voltage, a voltage-to-current conversion circuit that receives the synaptic voltage and generates a membrane voltage, and a neuron circuit that receives the membrane voltage and a threshold voltage and generates an output spike signal based on the received membrane voltage and the received threshold voltage.

Abstract: Disclosed is a spike neural network circuit which includes a pulse generator that receives an input spike signal and generates a first modulation pulse and a second modulation pulse based on the input spike signal, first and second current source arrays controlled based on a weight memory, a membrane capacitor, a first switch that delivers a first calculation signal generated from the first current source array to the membrane capacitor, in response to the first modulation pulse, and a second switch that delivers a second calculation signal generated from the second current source array to the membrane capacitor, in response to the second modulation pulse.

Abstract: A battery pack includes a plurality of battery modules; a vent frame disposed along the edges of the plurality of battery modules; and a housing accommodating the plurality of battery modules and the vent frame, wherein the vent frame includes a pair of vertical beams formed parallel to a first direction and a pair of horizontal beams formed parallel to a second direction intersecting the first direction, the vertical beam and the horizontal beam each having a shape of a tube and including a cover formed on the vertical beam or the horizontal beam in a length direction, and a passage surrounded by the cover for gas to pass through.

Abstract: A battery pack includes: a pack frame in which a plurality of battery modules are mounted to be spaced apart from each other; and an insulating member positioned between a bottom surface of the battery module and a bottom surface of the pack frame. The battery module includes a battery cell stack where a plurality of battery cells are stacked, a module frame that accommodates the battery cell stack, and a heat sink that is positioned on a bottom portion of the module frame, the bottom portion of the module frame forms an upper plate of the heat sink, and the bottom portion of the module frame is in contact with refrigerant supplied in the heat sink.

Abstract: The battery pack includes at least one battery module having a plurality of battery cells; a pack tray having a module mounting portion configured to mount one or more of the battery modules and extending in a horizontal direction, and a side cover portion extending upwardly from an outer periphery of the module mounting portion to cover a side of the battery module; and at least one side plate coupled to any one or more of the module mounting portion and the side cover portion, provided on one or both sides of the battery module, having a plurality of through-holes, and configured to block at least one surface of the battery module when the battery module is expanded.

Abstract: A battery pack includes a pack frame in which a plurality of battery modules are installed to be spaced apart from each other; and a pair of a cooling member and a heat insulating member positioned under the battery module, wherein the heat insulating member is positioned between the cooling member and a bottom surface of the pack frame, and pairs of cooling members and heat insulating members respectively positioned under battery modules adjacent to each other among the plurality of battery modules are spaced apart from each other.

Abstract: A method of automatically generating AutoCAD drawings includes: receiving, by a receiving unit, a data sheet generated only with input data necessary for drawing a column from strength calculation data for the column provided by a strength calculation program; loading, by a loading unit, the input data; and generating AutoCAD drawings of the column by activating an automatic AutoCAD drawing generation interface by a user's selection after the input data is loaded, the automatic AutoCAD drawing generation interface being activatable only after the input data is loaded.

Abstract: Disclosed herein is a memory-type camouflaged logic gate using transistors having different threshold voltages. The camouflaged logic gate may include two or more candidate logic gates, memory, the output signal of which is adjusted based on two or more transistors having different threshold voltages, and a multiplexer for selectively outputting the output of one of the two or more candidate logic gates depending on the output signal of the memory.

Abstract: Discussed is a battery pack, which may include a battery module including a battery cell and having a cooling pipe unit including a coolant flow path for cooling the battery cell, a pack case configured to accommodate the battery module, a coolant inflow and outflow pipe configured to supply a coolant to the coolant flow path and to discharge the coolant from the coolant flow path to an outside of the pack case, a first sealing unit between the coolant inflow and outflow pipe and the pack case, and a second sealing unit between the coolant inflow and outflow pipe and the cooling pipe unit.

Abstract: A battery pack including: a plurality of battery modules configured to include a battery cell stack in which a plurality of battery cells are stacked, a module frame accommodating the battery cell stack, and a heat sink positioned under a bottom portion of the module frame; a pack frame configured to accommodate the plurality of battery modules; a pack refrigerant pipe assembly connected to the plurality of battery modules; and a pack refrigerant pipe housing configured to accommodate the pack refrigerant pipe assembly, wherein the plurality of battery modules include a first battery module and a second battery module facing each other, and wherein the pack refrigerant pipe assembly and the pack refrigerant pipe housing are positioned between the first battery module and the second battery module.

Abstract: Provided is a Complementary Metal Oxide Semiconductor (CMOS) logic element. The CMOS logic element includes a substrate including a PMOS area, a circuit wiring structure including an insulating layer and a wiring layer alternately stacked on the substrate, wherein the circuit wiring structure includes an NMOS area vertically spaced apart from the PMOS area, a first transistor disposed on the PMOS area, and a second transistor disposed on the NMOS area and complementarily connected to the first transistor, wherein the first transistor includes a first gate electrode, source/drain areas formed on the PMOS area on both sides of the first gate electrode, and a first channel connecting the source and drain areas to each other, wherein the second transistor includes a second gate electrode and a second channel vertically overlapping the second gate electrode, wherein the first channel includes silicon, wherein the second channel includes an oxide semiconductor.

Abstract: Provided is a static random-access memory (SRAM) device.

Abstract: A battery pack including a battery module that includes a battery cell stack where a plurality of battery cells are stacked; and a pack frame that accommodates the battery module; wherein the pack frame includes a bottom portion where the battery module is positioned, and a guide pin protruded upward from the bottom portion, wherein the battery module includes a guide portion where a guide hole is formed and a mounting portion for fixing the battery module, and wherein, when the battery module is accommodated in the pack frame, the guide pin passes through the guide hole.