Abstract: The present invention relates to a parallel data transferring and processing circuit which minimizes the number of necessary channels and mate the remote data transfer easy by reconstruction of parallel data after serial transfer of parallel data through a single channel. The parallel data are converted to the serial data by a serial conversion part and subsequently transferred through a single channel. An oscillation and control part controls the serial data and provide a synchronous signal to the serial data to be transferred. Next, the serial data transferred is again converted to the parallel data by a parallel conversion part. An oscillation and impulse generation part synchronizes the parallel conversion part with the serial conversion part. Finally, the parallel data is reconstructed to the original signal by a sample-and-hold circuit. Therefore, the present invention transfers and processes both analog and digital signal through a single channel.