Abstract: An apparatus and a method for inverter control are disclosed. A method according to an embodiment of the present disclosure comprises: discretizing, in a continuous time domain, a voltage equation for a motor in a stationary coordinate system in which a zero-order hold and time delay is reflected; and determining a voltage equation for the motor in a synchronous coordinate system in a discrete time domain by reflecting the position and speed of a rotor of the motor.

Abstract: The inverter includes an inverting module including a plurality of switching elements, wherein the inverting module are configured for receiving a direct current (DC) stage voltage and for generating an output voltage of three-phases via switching of the switching elements. The device includes: a command voltage outputting unit configured for providing a pulse width modulation (PWM) control signal corresponding to an initial command voltage to the switching elements of the inverting module when the initial command voltage is within a voltage limit; a modulation index modifying unit configured for modifying a modulation index of the initial command voltage when the initial command voltage is outside the voltage limit; and an overmodulated command voltage generation unit configured for modifying the initial command voltage using the modified modulation index to form a modified command voltage and for limiting the modified command voltage to the voltage limit to generate an overmodulated command voltage.

Abstract: The inverter includes an inverting module including a plurality of switching elements, wherein the inverting module are configured for receiving a direct current (DC) stage voltage and for generating an output voltage of three-phases via switching of the switching elements. The device includes: a command voltage outputting unit configured for providing a pulse width modulation (PWM) control signal corresponding to an initial command voltage to the switching elements of the inverting module when the initial command voltage is within a voltage limit; a modulation index modifying unit configured for modifying a modulation index of the initial command voltage when the initial command voltage is outside the voltage limit; and an overmodulated command voltage generation unit configured for modifying the initial command voltage using the modified modulation index to form a modified command voltage and for limiting the modified command voltage to the voltage limit to generate an overmodulated command voltage.

Abstract: The present disclosure relates to a damping apparatus of a converter system, which compensates an input voltage reference being transmitted to a converter to damp an output current of a harmonic filter that is connected between an output end of the converter and a system, including a voltage reference compensation unit configured to compensate for the input voltage reference using a ratio between inductances of inductors included in the harmonic filter; a capacitor voltage value compensation unit configured to compensate for a voltage value of a capacitor included in the harmonic filter using the ratio between the inductances of the inductors; and a voltage reference generation unit configured to generate a final voltage reference by subtracting the compensated voltage value of the capacitor from the compensated input voltage reference.

Abstract: The present disclosure relates to a damping apparatus of a converter system, which compensates an input voltage reference being transmitted to a converter to damp an output current of a harmonic filter that is connected between an output end of the converter and a system, including a voltage reference compensation unit configured to compensate for the input voltage reference using a ratio between inductances of inductors included in the harmonic filter; a capacitor voltage value compensation unit configured to compensate for a voltage value of a capacitor included in the harmonic filter using the ratio between the inductances of the inductors; and a voltage reference generation unit configured to generate a final voltage reference by subtracting the compensated voltage value of the capacitor from the compensated input voltage reference.