Patents by Inventor Byung Gu Gyun

Byung Gu Gyun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory and manufacturing method thereof
    Patent number: 8907435
    Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: December 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Min Suk Lee, Byung Gu Gyun, Bo Kyoung Jung, Chang Hyup Shin
  • Semiconductor memory and manufacturing method thereof
    Patent number: 8420408
    Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 16, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventors: Min Suk Lee, Byung Gu Gyun, Bo Kyoung Jung, Chang Hyup Shin
  • SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF
    Publication number: 20120018826
    Abstract: A method for manufacturing a semiconductor memory device includes sequentially depositing a bottom electrode layer, a magnetic tunnel junction (MTJ) layer, a first top electrode layer, a second top electrode layer and a mask layer, etching the mask layer and forming a mask pattern, etching the second top electrode layer and the first top electrode layer by using the mask pattern as an etch barrier, etching the MTJ layer by using the mask layer and the second top electrode layer as an etch barrier, and etching the bottom electrode layer by using the first top electrode layer as an etch barrier.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 26, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventors: Min Suk LEE, Byung Gu Gyun, Bo Kyoung Jung, Chang Hyup Shin