Patents by Inventor Byung-Hak Cho

Byung-Hak Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10312959
    Abstract: Provided are a semiconductor device and an operating method thereof. The semiconductor device includes a mode controller configured to output a first control signal in a first communication mode, and output a second control signal in a second communication mode which is different from the first communication mode; and a configurable circuit configured to generate a first output signal to be transmitted to a first type analog-to-digital converter (ADC) in the first communication mode, and generate a second output signal using a second type ADC in the second communication mode, wherein the configurable circuit comprises a switching circuit configured to change a circuit configuration to a first circuit configuration for generating a first output signal in the first communication mode or to a second circuit configuration for generating a second output signal in the second communication mode, depending on the first control signal or the second control signal received from the mode controller.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: June 4, 2019
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jong Woo Lee, Jae Hoon Lee, Jong Mi Lee, Thomas Byung Hak Cho
  • Patent number: 9912311
    Abstract: Provided is a reconfigurable amplifier. The reconfigurable amplifier includes a gain circuit including a gain path configured to amplify an input signal, and a feed forward circuit including a feed forward path configured to receive the input signal and perform feed forward compensation on the input signal, and a first control circuit configured to perform the feed forward compensation in a first mode by activating the feed forward path, and deactivate the feed forward path in a second mode different from the first mode.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: March 6, 2018
    Assignee: Samsung Electronics Co., Ltd
    Inventors: So-Young Kang, Thomas Byung-Hak Cho, Hee-Seon Shin, Su-Seob Ahn, Jong-Mi Lee, Min-Gyu Jo
  • Patent number: 9871492
    Abstract: An analog amplifier is provided. The analog variable amplifier includes a first amplifier stage configured to amplify a bias current to output a first output voltage and a second output voltage that respectively depend on a magnitude of a first input voltage and a second input voltage, a second amplifier stage configured to receive the first output voltage and the second output voltage of the first amplifier stage as inputs and to amplify the received first output voltage and the second output voltage, and at least one auxiliary bias current source coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the first output voltage, and coupled to an electrical connection between the first amplifier stage and the second amplifier stage through which the second amplifier stage receives the second output voltage.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: January 16, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Woo Lee, Byung-Hak Cho, Jae-Hyun Lim
  • Patent number: 9866189
    Abstract: An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: January 9, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Woo Lee, Thomas Byung-Hak Cho, Jae-Hyun Lim
  • Patent number: 9853652
    Abstract: A semiconductor device is provided that includes a first chip that generates a single signal by connecting a first signal line and a second signal line, to which differential signals are respectively provided, and outputs the single signal to a third signal line. The first chip is driven by a first power supply voltage. The semiconductor device also includes a second chip comprising an analog-to-digital converter (ADC) that receives the single signal through the third signal line, compares the single signal with a reference voltage, and outputs a digital signal based on the comparison. The semiconductor device also includes a controller that monitors the digital signal and adjusts the reference voltage to be approximately equivalent to the first power supply voltage.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: December 26, 2017
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jong-Woo Lee, Thomas Byung-Hak Cho
  • Publication number: 20170343590
    Abstract: The present disclosure relates to a hand-held voltmeter measuring a peak voltage of a high voltage pulse applied to an electric fence. The voltmeter includes a body case of which one side has an opening, a sensor case protruded from the opening of the body case, a voltage divider disposed over the inside and the outside of the sensor case for dividing the high voltage pulse into a low divided voltage, a peak detector for detecting the peak voltage of the divided voltage, a display unit for displaying the peak voltage, and an MCU for controlling the input and the output of the elements constituting the voltmeter. According to the present disclosure, an electric fence voltmeter that measures the peak voltage accurately without need to make a ground connection to the earth, and has a low risk of an electric shock during a measurement is provided.
    Type: Application
    Filed: August 26, 2016
    Publication date: November 30, 2017
    Inventor: Byung-Hak Cho
  • Patent number: 9829515
    Abstract: The present disclosure relates to a hand-held voltmeter measuring a peak voltage of a high voltage pulse applied to an electric fence. The voltmeter includes a body case of which one side has an opening, a sensor case protruded from the opening of the body case, a voltage divider disposed over the inside and the outside of the sensor case for dividing the high voltage pulse into a low divided voltage, a peak detector for detecting the peak voltage of the divided voltage, a display unit for displaying the peak voltage, and an MCU for controlling the input and the output of the elements constituting the voltmeter. According to the present disclosure, an electric fence voltmeter that measures the peak voltage accurately without need to make a ground connection to the earth, and has a low risk of an electric shock during a measurement is provided.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 28, 2017
    Inventor: Byung-Hak Cho
  • Publication number: 20170264334
    Abstract: Provided are a semiconductor device and an operating method thereof. The semiconductor device includes a mode controller configured to output a first control signal in a first communication mode, and output a second control signal in a second communication mode which is different from the first communication mode; and a configurable circuit configured to generate a first output signal to be transmitted to a first type analog-to-digital converter (ADC) in the first communication mode, and generate a second output signal using a second type ADC in the second communication mode, wherein the configurable circuit comprises a switching circuit configured to change a circuit configuration to a first circuit configuration for generating a first output signal in the first communication mode or to a second circuit configuration for generating a second output signal in the second communication mode, depending on the first control signal or the second control signal received from the mode controller.
    Type: Application
    Filed: March 8, 2017
    Publication date: September 14, 2017
    Inventors: Jong Woo LEE, Jae Hoon LEE, Jong Mi Lee, Thomas Byung Hak CHO
  • Patent number: 9722624
    Abstract: A semiconductor device and operating method thereof are provided.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: August 1, 2017
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jong-Woo Lee, Seung-Hyun Oh, Thomas Byung-Hak Cho
  • Patent number: 9709606
    Abstract: The present disclosure provides an electric fence voltmeter having a peak detection type voltage divider. The peak detection type voltage divider has an extremely simple configuration composed of two capacitor voltage dividers and two rectifier diodes for detecting the positive and the negative peak voltages of a high voltage pulse with an additional pulse state voltage having information on the moments the high voltage pulse starts and peaks. Thus, the voltmeter has reduced number of parts with simplified circuits, and is able to measure the peak voltage accurately with a reliable and efficient manner using the pulse state voltage. Thereby the voltmeter has benefits of improved measurement accuracy, reduced production cost, and low battery consumption.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: July 18, 2017
    Inventor: Byung-Hak Cho
  • Publication number: 20170163227
    Abstract: An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.
    Type: Application
    Filed: September 3, 2013
    Publication date: June 8, 2017
    Applicant: Samsung Electronics Co. Ltd.
    Inventors: Jong-Woo LEE, Thomas Byung-Hak CHO, Jae-Hyun LIM
  • Patent number: 9590665
    Abstract: A transmitter in a wireless communication system is provided. The transmitter includes a baseband signal processor for detecting an envelope signal, a supply modulator (SM) for producing power to be supplied to a power amplifier using the detected envelope signal, and the power amplifier for receiving voltage from the SM and for amplifying power of a transmit signal. The SM generates a compensation signal corresponding to switching noise generated via switching amplification, and adds the compensation signal and the switching noise. The amplifier of the wireless communication system can produce low switching noise, and the envelope tracking power amplifier can prevent reception degradation due to the noise of the supply modulator.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: March 7, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-Sun Lim, Seung-Chul Lee, Thomas Byung-Hak Cho, Ji-Seon Paek, Jun-Seok Yang, Jun-Hee Jung
  • Publication number: 20170026030
    Abstract: Provided is a reconfigurable amplifier. The reconfigurable amplifier includes a gain circuit including a gain path configured to amplify an input signal, and a feed forward circuit including a feed forward path configured to receive the input signal and perform feed forward compensation on the input signal, and a first control circuit configured to perform the feed forward compensation in a first mode by activating the feed forward path, and deactivate the feed forward path in a second mode different from the first mode.
    Type: Application
    Filed: May 25, 2016
    Publication date: January 26, 2017
    Inventors: So-Young KANG, Thomas Byung-Hak Cho, Hee-Seon Shin, Su-Seob Ahn, Jong-Mi Lee, Min-Gyu Jo
  • Publication number: 20170026051
    Abstract: A semiconductor device is provided that includes a first chip that generates a single signal by connecting a first signal line and a second signal line, to which differential signals are respectively provided, and outputs the single signal to a third signal line. The first chip is driven by a first power supply voltage. The semiconductor device also includes a second chip comprising an analog-to-digital converter (ADC) that receives the single signal through the third signal line, compares the single signal with a reference voltage, and outputs a digital signal based on the comparison. The semiconductor device also includes a controller that monitors the digital signal and adjusts the reference voltage to be approximately equivalent to the first power supply voltage.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 26, 2017
    Inventors: Jong-Woo LEE, Thomas Byung-Hak CHO
  • Patent number: 9503117
    Abstract: Provided are a semiconductor device and a System on Chip (SoC).
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: November 22, 2016
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jong-Woo Lee, Seung-Hyun Oh, Byung-Hak Cho
  • Publication number: 20160308549
    Abstract: A semiconductor device and operating method thereof are provided.
    Type: Application
    Filed: March 18, 2016
    Publication date: October 20, 2016
    Inventors: Jong-Woo LEE, Seung-Hyun OH, Thomas Byung-Hak CHO
  • Publication number: 20160269040
    Abstract: Provided are a semiconductor device and a System on Chip (SoC).
    Type: Application
    Filed: February 24, 2016
    Publication date: September 15, 2016
    Inventors: Jong-Woo LEE, Seung-Hyun OH, Byung-Hak CHO
  • Patent number: 9432037
    Abstract: Provided is an apparatus for analog-digital converting that includes a Most Significant Bit (MSB)-Digital Analog Converter (DAC) for converting a digital signal into an analog signal, a trim capacitor, a Least Significant Bit (LSB)-DAC, coupled to the trim capacitor, for converting a digital signal into an analog signal, a bridge capacitor connecting the MSB-DAC and the LSB-DAC, a comparator for measuring a voltage value at the MSB-DAC and LSB-DAC and outputting a result of comparing with a sampled voltage value, and a controller for generating first measurement data by digital converting a first measurement value output from the comparator by applying a reference voltage to a unit capacitor of the MSB-DAC, for generating second measurement data by digital converting a second measurement value output from the comparator by applying the reference voltage to the LSB-DAC, and controlling the trim capacitor by comparing the first and second measurement data.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: August 30, 2016
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Seung-Hyun Oh, Jong-Woo Lee, Thomas Byung-Hak Cho
  • Publication number: 20160126967
    Abstract: Provided is an apparatus for analog-digital converting that includes a Most Significant Bit (MSB)-Digital Analog Converter (DAC) for converting a digital signal into an analog signal, a trim capacitor, a Least Significant Bit (LSB)-DAC, coupled to the trim capacitor, for converting a digital signal into an analog signal, a bridge capacitor connecting the MSB-DAC and the LSB-DAC, a comparator for measuring a voltage value at the MSB-DAC and LSB-DAC and outputting a result of comparing with a sampled voltage value, and a controller for generating first measurement data by digital converting a first measurement value output from the comparator by applying a reference voltage to a unit capacitor of the MSB-DAC, for generating second measurement data by digital converting a second measurement value output from the comparator by applying the reference voltage to the LSB-DAC, and controlling the trim capacitor by comparing the first and second measurement data.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 5, 2016
    Inventors: Seung-Hyun OH, Jong-Woo LEE, Thomas Byung-Hak CHO
  • Patent number: 9252784
    Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: February 2, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joon-Hee Lee, Jong-Won Choi, Young-Taek Lee, Byung-Hak Cho, Young-Gun Pu