Patents by Inventor Byung Ho KIL

Byung Ho KIL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11365476
    Abstract: The present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: June 21, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Praket P. Jha, Allen Ko, Xinhai Han, Thomas Jongwan Kwon, Bok Hoen Kim, Byung Ho Kil, Ryeun Kim, Sang Hyuk Kim
  • Publication number: 20190185996
    Abstract: The present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.
    Type: Application
    Filed: February 6, 2019
    Publication date: June 20, 2019
    Inventors: Praket P. JHA, Allen KO, Xinhai HAN, Thomas Jongwan KWON, Bok Hoen KIM, Byung Ho KIL, Ryeun KIM, Sang Hyuk KIM
  • Patent number: 10246772
    Abstract: A method for forming a high aspect ratio feature is disclosed. The method includes depositing one or more silicon oxide/silicon nitride containing stacks on a substrate by depositing a first film layer on the substrate from a first plasma and depositing a second film layer having a refractive index on the first film layer from a second plasma. A predetermined number of first film layers and second film layers are deposited on the substrate. The first film layer and the second film layer are either a silicon oxide layer or a silicon nitride layer and the first film layer is different from the second film layer. The method further includes depositing a third film layer from a third plasma and depositing a fourth film layer on the third film layer from a fourth plasma. The fourth film layer has a refractive index greater than the first refractive index.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: April 2, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Praket P. Jha, Allen Ko, Xinhai Han, Thomas Jongwan Kwon, Bok Hoen Kim, Byung Ho Kil, Ryeun Kim, Sang Hyuk Kim
  • Publication number: 20160293609
    Abstract: Implementations of the present disclosure generally relate to thin films incorporating high aspect ratio feature definitions and methods for forming the same. As gate height increases, 3D NAND gate stacks are subject to higher aspect ratio etching. Due to the current limitations of etching techniques, the vertical etch profile typically tapers as the depth into the gate stack increases. The inventors have devised a unique deposition scheme that compensates for etch performance degradation in deep trenches by a novel plasma-enhanced chemical vapor deposition (PECVD) film deposition method. The inventors have found that by grading various properties (e.g., refractive index, stress of the film, dopant concentration in the film) of the as-deposited films (e.g., silicon nitride) a more uniform etch profile can be achieved by compensating for variations in both dry and wet etch rates.
    Type: Application
    Filed: March 8, 2016
    Publication date: October 6, 2016
    Inventors: Praket P. JHA, Allen KO, Xinhai HAN, Thomas Jongwan KWON, Bok Hoen KIM, Byung Ho KIL, Ryeun KIM, Sang Hyuk KIM