Abstract: A semiconductor package includes a support member having first and second surfaces, having a cavity, and including a wiring structure, a semiconductor chip having connection pads, a connection member including a first insulating layer, a first redistribution layer on the first insulating layer, and a plurality of first vias connecting the wiring structure and the connection pads to the first redistribution layer and an encapsulant encapsulating the semiconductor chip, The wiring structure includes wiring patterns disposed on the second surface of the support member, and the first insulating layer includes a first insulating coating covering the wiring patterns and a second insulating coating disposed on the first insulating coating and having a higher level of flatness than that of the first insulating coating.

Abstract: A semiconductor package includes a support member having first and second surfaces opposing each other, including a cavity penetrating through the first and second surfaces, and having a primer layer disposed on the first surface; a connection member disposed on the first surface of the support member and having a redistribution layer, the primer layer being disposed between the connection member and the support member; a semiconductor chip having an active surface on which connection pads are disposed and an inactive surface opposing the active surface, the connection pads being electrically connected to the redistribution layer; and an encapsulant covering the second surface of the support member and the inactive surface of the semiconductor chip.

Abstract: A fan-out semiconductor package includes: a core member including a support layer, a first wiring layer, a second wiring layer, and through-vias and having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant covering the core member and the semiconductor chip and filling at least portions of the through-hole; a connection member including an insulating layer disposed on the first wiring layer and the semiconductor chip, a redistribution layer disposed on the insulating layer, first vias electrically connecting the redistribution layer and the connection pads to each other, and second vias electrically connecting the redistribution layer and the first wiring layer to each other; and a passivation layer disposed on the insulating layer and covering the redistribution layer, wherein a thickness of the passivation layer is within half a distance from an inactive surface of the semiconductor chip to a lower surface of the encapsulant.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.

Abstract: Solid state drives may include a controller, a mapping table and a buffer memory. The controller provides a logical address of associated data through a first input-output unit at a first speed and provides the associated data through a second input-output unit at a second speed. The controller may be connected to the first input-output unit and the second input-output unit. The mapping table may be connected to the controller through the first input-output unit. The buffer memory may be connected to the controller through the second input-output unit. The first input-output unit may be physically separated from the second input-output unit. The first speed may be different from the second speed.

Abstract: An on-die termination (ODT) circuit connected to an input buffer that receives a data signal, the ODT circuit includes at least one termination resistor connected to the input buffer and at least one switching device configured to control a connection between the termination resistor and the input buffer. The switching device is turned on or off according to information about the data signal.

Abstract: An imaging apparatus is provided, which includes an image sensor which includes a plurality of image pixels and a plurality of sensing pixels, and is configured to capture images through collection of light that is incident through a lens and the plurality of phase sensing pixels; and a processor configured to divide a region of interest of the image sensor into a plurality of sub-regions of interest, calculate disparity information of objects that correspond to the plurality of sub-regions of interest using at least one of the plurality of phase sensing pixels included in the plurality of sub-regions of interest, and determine a focal region in the region of interest on the basis of the disparity information. Accordingly, user convenience is increased.

Abstract: A substrate thinning apparatus includes a chuck table capable of supporting a substrate, a rotatable grinding device which includes a wheel tip capable of grinding the substrate supported by the chuck table, and a cleaning device configured to perform synchronized cleaning of the wheel tip while the grinding device is rotated. When the substrate thinning apparatus is used, even an extremely thin semiconductor device can be fabricated with substantial reliability.

Abstract: An electronic device is provided. The electronic device includes at least one lens, an image sensor, an optical image stabilization (OIS) module configured to move at least one of the image sensor or the at least one lens in relation to OIS, and an image processor electrically connected with the OIS module.

Abstract: A semiconductor device includes a plurality of memory chips arranged in a line on a substrate, and a bus connected to the plurality of memory chips and configured to sequentially supply an electrical signal to the plurality of memory chips in accordance with a fly-by topology. An order in which the electrical signal is supplied to the plurality of memory chips is different from an order in which the plurality of memory chips is arranged in the line on the substrate.

Abstract: An electronic device includes a lens part that receives light from a subject, an image sensor that receives the light of the lens part from a group of pixels arranged two-dimensionally, and an processor that processes an image signal of the image sensor. The image sensor performs a read-out operation at a speed to prevent blurring of an image. The processor temporarily stores image data by the read-out operation in a memory, loads a plurality of images stored in the memory to generate an image, of which the number of bits is expanded compared with the image signal of the image sensor, and performs gamma processing on the image, of which the number of bits is expanded, to generate an image compressed to the same number of bits as the image signal of the image sensor.

Abstract: A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface; a second interconnection member disposed on the first interconnection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads; and an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip.

Abstract: An on-die termination (ODT) circuit connected to an input buffer that receives a data signal, the ODT circuit includes at least one termination resistor connected to the input buffer and at least one switching device configured to control a connection between the termination resistor and the input buffer. The switching device is turned on or off according to information about the data signal.

Abstract: A computer power supply device having a fan control circuit for cooling a standby power source unit in a state in which a computer is turned off, including: a power source for providing power to each part included in a computer main body while generating main power and standby power; a cooling control circuit; and a detection sensor.

Abstract: A memory module includes at least two rows of memory device packages on a substrate and coupled to a control signal line. A first memory device package in a first row is connected to the control signal line at a first point closest to the proximal end of the control signal line and a second memory device in a second row is connected to the control signal line at a second point next closest to the first point. A signal trace length between the first memory device and the second memory device may be greater than a signal trace length between the first memory device package and a third memory device package immediately adjacent the first memory device package in the first row or a signal trace length between the second memory device package and a fourth memory device package immediately adjacent the second memory device package in the second row.

Abstract: A substrate thinning apparatus includes a chuck table capable of supporting a substrate, a rotatable grinding device which includes a wheel tip capable of grinding the substrate supported by the chuck table, and a cleaning device configured to perform synchronized cleaning of the wheel tip while the grinding device is rotated. When the substrate thinning apparatus is used, even an extremely thin semiconductor device can be fabricated with substantial reliability.

Abstract: A memory module includes at least two rows of memory device packages on a substrate and coupled to a control signal line. A first memory device package in a first row is connected to the control signal line at a first point closest to the proximal end of the control signal line and a second memory device in a second row is connected to the control signal line at a second point next closest to the first point. A signal trace length between the first memory device and the second memory device may be greater than a signal trace length between the first memory device package and a third memory device package immediately adjacent the first memory device package in the first row or a signal trace length between the second memory device package and a fourth memory device package immediately adjacent the second memory device package in the second row.

Abstract: Solid state drives may include a controller, a mapping table and a buffer memory. The controller provides a logical address of associated data through a first input-output unit at a first speed and provides the associated data through a second input-output unit at a second speed. The controller may be connected to the first input-output unit and the second input-output unit. The mapping table may be connected to the controller through the first input-output unit. The buffer memory may be connected to the controller through the second input-output unit. The first input-output unit may be physically separated from the second input-output unit. The first speed may be different from the second speed.

Abstract: An imaging apparatus is provided, which includes an image sensor which includes a plurality of image pixels and a plurality of sensing pixels, and is configured to capture images through collection of light that is incident through a lens and the plurality of phase sensing pixels; and a processor configured to divide a region of interest of the image sensor into a plurality of sub-regions of interest, calculate disparity information of objects that correspond to the plurality of sub-regions of interest using at least one of the plurality of phase sensing pixels included in the plurality of sub-regions of interest, and determine a focal region in the region of interest on the basis of the disparity information. Accordingly, user convenience is increased.