Patents by Inventor Byung-Kook Sun

Byung-Kook Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7284317
    Abstract: Disclosed is a method of producing a printed circuit board (PCB) with an embedded resistor, in which a resistor with a desired shape and volume is precisely formed using a resistor paste so that resistance values according to a position of the PCB are uniform, thereby a laser trimming process is omitted or minimally utilized. The method has advantages in that a production time of the PCB is shortened and productivity is improved because an operation condition is rapidly set without being greatly affected by the position precision of a printing device. Other advantages of the method are that the resistor paste with a relatively uniform thickness is secured through a screen printing process, thereby easily forming the resistor and improving resistance tolerance.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: October 23, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk-Hyun Cho, Jang-Kyu Kang, Byung-Kook Sun, Jong-Kuk Hong, Seok-Kyu Lee, Jin-Yong Ahn
  • Patent number: 7279412
    Abstract: Disclosed are a multi-layer printed circuit board and a method for manufacturing the multi-layer printed circuit board. Circuit layers and insulating layers are alternately stacked so that via holes of the circuit layers provided with plated inner walls without application of additional plating and conductive paste-filling steps are connected to via holes of the insulating layers filled with a conductive paste.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: October 9, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Geum-Hee Yun, Tae-Hoon Kim
  • Patent number: 7169707
    Abstract: Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: January 30, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Duck Young Maeng, Byung Kook Sun, Tae Hoon Kim, Jee Soo Mok, Jong Suk Bae, Yoong Oh, Chang-Kyu Song, Suk-Hyeon Cho
  • Publication number: 20060029726
    Abstract: Disclosed is a method of fabricating a multilayer PCB (MLB). More particularly, the present invention relates to a method of fabricating a multilayer PCB, in which plural circuit layers having insulating layers attached thereto and another circuit layer having no insulating layer are formed in a parallel manner according to separate processes, and laminated at one time, unlike fabrication of the multilayer PCB adopting a conventional build-up manner.
    Type: Application
    Filed: September 24, 2004
    Publication date: February 9, 2006
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Jun-Heyoung Park, Duck-Young Maeng, Tae-Hoon Kim
  • Publication number: 20050284657
    Abstract: Disclosed is a method of fabricating a double-sided PCB without via holes, functioning to transport electric signals between both sides of the PCB, by folding a flexible substrate, in which circuit patterns are formed on only one side of the flexible substrate, and the double-sided PCB without the via holes fabricated by the method. Therefore, the method is advantageous in that it allows PCB manufacturers to save the efforts for forming and protecting the via holes because the double-sided PCB does not need via holes, and reduces its fabricating cost and time, due to simplicity of this method.
    Type: Application
    Filed: August 8, 2005
    Publication date: December 29, 2005
    Inventors: Chang-Sup Ryu, Jang-Kyu Kang, Byung-Kook Sun
  • Publication number: 20050175385
    Abstract: Disclosed is a method of producing a printed circuit board (PCB) with an embedded resistor, in which a resistor with a desired shape and volume is precisely formed using a resistor paste so that resistance values according to a position of the PCB are uniform, thereby a laser trimming process is omitted or minimally utilized. The method has advantages in that a production time of the PCB is shortened and productivity is improved because an operation condition is rapidly set without being greatly affected by the position precision of a printing device. Other advantages of the method are that the resistor paste with a relatively uniform thickness is secured through a screen printing process, thereby easily forming the resistor and improving resistance tolerance.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 11, 2005
    Inventors: Suk-Hyun Cho, Jang-Kyu Kang, Byung-Kook Sun, Jong-Kuk Hong, Seok-Kyu Lee, Jin-Yong Ahn
  • Publication number: 20050085065
    Abstract: Disclosed are a multi-layer printed circuit board and a method for manufacturing the multi-layer printed circuit board. Circuit layers and insulating layers are alternately stacked so that via holes of the circuit layers provided with plated inner walls without application of additional plating and conductive paste-filling steps are connected to via holes of the insulating layers filled with a conductive paste.
    Type: Application
    Filed: November 20, 2003
    Publication date: April 21, 2005
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Geum-Hee Yun, Tae-Hoon Kim
  • Publication number: 20040194303
    Abstract: Disclosed is a method of fabricating a multi-layered PCB, wherein a plurality of circuit layers on which circuit patterns are constructed and insulating layers which are alternately positioned between the circuit layers to insulate the circuit layers from each other are severally fabricated according to different processes, and then layered with each other at once.
    Type: Application
    Filed: October 2, 2003
    Publication date: October 7, 2004
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Eung-Soo Kim, Jang-Kyu Kang, Jee-Soo Mok, John-Tae Lee, Chang-Kyu Song, Byung-Kook Sun
  • Publication number: 20040124003
    Abstract: Disclosed is a method of fabricating a double-sided PCB without via holes, functioning to transport electric signals between both sides of the PCB, by folding a flexible substrate, in which circuit patterns are formed on only one side of the flexible substrate, and the double-sided PCB without the via holes fabricated by the method. Therefore, the method is advantageous in that it allows PCB manufacturers to save the efforts for forming and protecting the via holes because the double-sided PCB does not need via holes, and reduces its fabricating cost and time, due to simplicity of this method.
    Type: Application
    Filed: April 16, 2003
    Publication date: July 1, 2004
    Inventors: Chang-Sup Ryu, Jang-Kyu Kang, Byung-Kook Sun
  • Patent number: 6405431
    Abstract: A method for manufacturing a build-up multi-layer printed circuit board is disclosed in which a YAG laser is used upon the formation of a via hole in the multi-layer printed circuit board, such that it can have the following advantages: the manufacturing process would become simple; the component packaging density and freedom for the design of the board would be improved; and a high speed of signal process would be ensured.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: June 18, 2002
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Dong Shin, Keon Yang Park, Young Hwan Shin, Byung Kook Sun, Jae Heun Joung
  • Patent number: 6393696
    Abstract: A method for manufacturing a printed circuit board is disclosed. When a metal is plated on an upper board to form a circuit, bonding fingers for being bonded with a semiconductor chip are prevented from being electroplated with a metal. That is, a slot with an ink layer formed therein is formed in each of a plurality of boards. Then window regions of different sizes are defined, and a working is carried out on the portion where the slots are not formed. That is, the copper clad laminates are subjected to a working to form slots, and an ink layer is formed within each of the slots. In this manner, during the plating of the upper face of the printed circuit board, the metal is prevented from intruding into the window region, thereby preventing the formation of a short circuit.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: May 28, 2002
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Kyung-Ro Yoon, Keon-Yang Park, Byung-Kook Sun
  • Patent number: 6119335
    Abstract: A method for manufacturing a build-up multi-layer printed circuit board for use in computers, VTR, or portable telephones is disclosed, in which the method of forming a hole in a circuit layer and the method of forming a hole in an insulating layer are made different from each other by applying a combined formation method, thereby improving the formation precision and efficiency in forming the holes. Specifically, a resin-clad copper foil (RCC) is stacked on a CCL (copper-clad laminate) after forming a printed circuit layer, and this structure is heated and pressed. Then, beams of an Nd-YAG laser are irradiated to remove the copper-clad layer, and then beams of CO.sub.2 laser are irradiated to remove the residual resin insulator, thereby forming a via hole. Then, circuit patterns are formed on the board on which the via hole has been formed.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: September 19, 2000
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Keon Yang Park, Byung Kook Sun, Jae Heun Joung, Dong Shin