Patents by Inventor Byung-Kwon Han
Byung-Kwon Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11735691Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: November 4, 2021Date of Patent: August 22, 2023Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20220328721Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: June 17, 2022Publication date: October 13, 2022Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20220320373Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: June 17, 2022Publication date: October 6, 2022Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20220320372Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: June 17, 2022Publication date: October 6, 2022Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 11271033Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: September 24, 2020Date of Patent: March 8, 2022Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20220059612Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: November 4, 2021Publication date: February 24, 2022Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 11201265Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: September 24, 2020Date of Patent: December 14, 2021Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10964845Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: GrantFiled: September 27, 2019Date of Patent: March 30, 2021Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10923628Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height, including a plurality of epitaxial layers such as a first n-layer, a first p-layer, and a first active layer. A second flat region at a second height and parallel to the first flat region includes at least a second n-layer. Sloped sidewalls connect the first flat region and the second flat region and include at least a third n-layer. The p-layer of the first flat region is thicker that at least a portion of the third region. A p-contact is formed on the first p-layer and an n-contact is formed on the second n-layer.Type: GrantFiled: September 26, 2019Date of Patent: February 16, 2021Assignee: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20210020687Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: September 24, 2020Publication date: January 21, 2021Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20210020806Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: September 24, 2020Publication date: January 21, 2021Applicant: Lumileds LLCInventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Patent number: 10811460Abstract: A uLED and method for regrowth with thinner deposition on sidewall are disclosed. The uLED and method include a growth substrate including flat first and second regions, where the growth substrate is thicker in the first region as compared to the second region, and a third region of sloped sidewalls connecting the first and second regions, the topography forming a regular geometric pattern, a plurality of semiconductor epitaxial layers covering the first, second, and third regions including at least a p-n junction layer including a light emitting active region of direct bandgap semiconductor, sandwiched between n-type and p-type layers, each of the plurality of semiconductor epitaxial layers being thicker on the first and second regions as compared to the corresponding semiconductor epitaxial layers on the third region, and a plurality of electrical contacts forming an anode and cathode on part of the first and second regions, respectively.Type: GrantFiled: September 27, 2018Date of Patent: October 20, 2020Assignee: Lumileds Holding B.V.Inventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20200105972Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height, including a plurality of epitaxial layers such as a first n-layer, a first p-layer, and a first active layer. A second flat region at a second height and parallel to the first flat region includes at least a second n-layer. Sloped sidewalls connect the first flat region and the second flat region and include at least a third n-layer. The p-layer of the first flat region is thicker that at least a portion of the third region. A p-contact is formed on the first p-layer and an n-contact is formed on the second n-layer.Type: ApplicationFiled: September 26, 2019Publication date: April 2, 2020Applicant: LUMILEDS HOLDING B.V.Inventors: Costas DIMITROPOULOS, Sungsoo YI, John Edward EPLER, Byung-Kwon HAN
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Publication number: 20200105824Abstract: A uLED and method for regrowth with thinner deposition on sidewall are disclosed. The uLED and method include a growth substrate including flat first and second regions, where the growth substrate is thicker in the first region as compared to the second region, and a third region of sloped sidewalls connecting the first and second regions, the topography forming a regular geometric pattern, a plurality of semiconductor epitaxial layers covering the first, second, and third regions including at least a p-n junction layer including a light emitting active region of direct bandgap semiconductor, sandwiched between n-type and p-type layers, each of the plurality of semiconductor epitaxial layers being thicker on the first and second regions as compared to the corresponding semiconductor epitaxial layers on the third region, and a plurality of electrical contacts forming an anode and cathode on part of the first and second regions, respectively.Type: ApplicationFiled: September 27, 2018Publication date: April 2, 2020Applicant: LUMILEDS HOLDING B.V.Inventors: Costas Dimitropoulos, Sungsoo Yi, John Edward Epler, Byung-Kwon Han
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Publication number: 20200105969Abstract: Techniques, devices, and systems are disclosed and include LEDs with a first flat region, at a first height from an LED base and including a plurality of epitaxial layers including a first n-layer, a first active layer, and a first p-layer. A second flat region is provided, at a second height from the LED base and parallel to the first flat region, and includes at least a second n-layer. A sloped sidewall connecting the first flat region and the second flat region is provided and includes at least a third n-layer, the first n-layer being thicker than at least a portion of third n-layer. A p-contact is formed on the first p-layer and an n-contact formed on the second n-layer.Type: ApplicationFiled: September 27, 2019Publication date: April 2, 2020Applicant: LUMILEDS HOLDING B.V.Inventors: Costas DIMITROPOULOS, Sungsoo YI, John Edward EPLER, Byung-Kwon HAN
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Publication number: 20110177638Abstract: A semiconductor structure is grown on a top surface of a growth substrate. The semiconductor structure comprises a III-nitride light emitting layer disposed between an n-type region and a p-type region. A curvature control layer is disposed in direct contact with the growth substrate. The growth substrate has a thermal expansion coefficient less than a thermal expansion coefficient of GaN and the curvature control layer has a thermal expansion coefficient greater than the thermal expansion coefficient of GaN.Type: ApplicationFiled: January 15, 2010Publication date: July 21, 2011Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLCInventors: Linda T. ROMANO, Byung-kwon HAN, Michael D. CRAVEN
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Patent number: 6917061Abstract: A heterojunction bipolar transistor is provided that has a reduced turn-on voltage threshold. A base spacer layer is provided and alternately an emitter layer is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.Type: GrantFiled: July 22, 2002Date of Patent: July 12, 2005Assignee: Microlink Devices, Inc.Inventors: Noren Pan, Byung-Kwon Han
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Patent number: 6784450Abstract: A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a graded base layer formed from antimony. The graded base allows the heterojunction bipolar transistor to establish a quasi-electric field to yield an improved cutoff frequency.Type: GrantFiled: July 22, 2002Date of Patent: August 31, 2004Assignee: MicroLink Devices, Inc.Inventors: Noren Pan, Byung-Kwon Han
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Patent number: 6661037Abstract: A heterojunction bipolar transistor is provided having an improved current gain cutoff frequency. The heterojunction bipolar transistor includes a contact region formed from InGaAsSb. The contact region allows an emitter region of the heterojunction bipolar transistor to realize a lower contact resistance value to yield an improved cutoff frequency (fT).Type: GrantFiled: July 22, 2002Date of Patent: December 9, 2003Assignee: MicroLink Devices, Inc.Inventors: Noren Pan, Byung-Kwon Han
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Publication number: 20030032252Abstract: A heterojunction bipolar transistor is provided that has a reduced turn-on voltage threshold. A base spacer layer is provided and alternately an emitter layer is provided that has a lowered energy gap. The lowered energy gap of the base spacer or the emitter spacer allow the heterojunction bipolar transistor to realize a lower turn-on voltage threshold. The thickness of the emitter layer if utilized is kept to a minimum to reduce the associated space charge recombination current in the heterojunction bipolar transistor.Type: ApplicationFiled: July 22, 2002Publication date: February 13, 2003Applicant: MicroLink Devices, Inc.Inventors: Noren Pan, Byung-Kwon Han