Abstract: A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region.

Abstract: A semiconductor memory apparatus includes a boundary circuit unit positioned between a low voltage page buffer and a high voltage page buffer and having circuits configured to electrically couple the low voltage page buffer and the high voltage page buffer. The boundary circuit unit includes: a first boundary circuit unit having first and second transistors configured to receive data of a corresponding memory cell area through a signal transmission line selected from a plurality of signal transmission lines extended and arranged along a first direction for each column; a second boundary circuit unit disposed adjacent in the first direction from the first boundary circuit unit and having the plurality of signal transmission lines extended and arranged thereon; and an active region where the first transistor is formed and an active region where the second transistor is formed are isolated from each other.

Abstract: A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region.

Abstract: A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a plurality of bit lines having a uniform width on a semiconductor substrate, an active region obliquely arranged to have a predetermined angle with respect to the bit lines, a spacer arranged around the bit lines connected to a center part of the active region. A contact pad is connected to a lower part of the bit lines. The spacer is formed not only at an upper part of sidewalls of the contact pad but also at sidewalls of the bit lines. As a result, a CD of the bit line contact increases, so that a bit line contact patterning margin also increases. A bit line pattern having a uniform width is formed so that a patterning margin increases. A storage electrode contact self-alignment margin increases so that a line-type storage electrode contact margin increases.

Abstract: A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region.

Abstract: A semiconductor memory apparatus includes a boundary circuit unit positioned between a low voltage page buffer and a high voltage page buffer and having circuits configured to electrically couple the low voltage page buffer and the high voltage page buffer. The boundary circuit unit includes: a first boundary circuit unit having first and second transistors configured to receive data of a corresponding memory cell area through a signal transmission line selected from a plurality of signal transmission lines extended and arranged along a first direction for each column; a second boundary circuit unit disposed adjacent in the first direction from the first boundary circuit unit and having the plurality of signal transmission lines extended and arranged thereon; and an active region where the first transistor is formed and an active region where the second transistor is formed are isolated from each other.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a plurality of bit lines having a uniform width on a semiconductor substrate, an active region obliquely arranged to have a predetermined angle with respect to the bit lines, a spacer arranged around the bit lines connected to a center part of the active region. A contact pad is connected to a lower part of the bit lines. The spacer is formed not only at an upper part of sidewalls of the contact pad but also at sidewalls of the bit lines. As a result, a CD of the bit line contact increases, so that a bit line contact patterning margin also increases. A bit line pattern having a uniform width is formed so that a patterning margin increases. A storage electrode contact self-alignment margin increases so that a line-type storage electrode contact margin increases.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a plurality of bit lines having a uniform width on a semiconductor substrate, an active region obliquely arranged to have a predetermined angle with respect to the bit lines, a spacer arranged around the bit lines connected to a center part of the active region. A contact pad is connected to a lower part of the bit lines. The spacer is formed not only at an upper part of sidewalls of the contact pad but also at sidewalls of the bit lines. As a result, a CD of the bit line contact increases, so that a bit line contact patterning margin also increases. A bit line pattern having a uniform width is formed so that a patterning margin increases. A storage electrode contact self-alignment margin increases so that a line-type storage electrode contact margin increases.

Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes a plurality of bit lines having a uniform width on a semiconductor substrate, an active region obliquely arranged to have a predetermined angle with respect to the bit lines, a spacer arranged around the bit lines connected to a center part of the active region. A contact pad is connected to a lower part of the bit lines. The spacer is formed not only at an upper part of sidewalls of the contact pad but also at sidewalls of the bit lines. As a result, a CD of the bit line contact increases, so that a bit line contact patterning margin also increases. A bit line pattern having a uniform width is formed so that a patterning margin increases. A storage electrode contact self-alignment margin increases so that a line-type storage electrode contact margin increases.