Patents by Inventor Byung-Sul RYU

Byung-Sul RYU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9390961
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first bit line structure extending in a first direction, a second bit line structure extending in the first direction and spaced apart from the first bit line structure, a storage contact plug located between the first bit line structure and the second bit line structure, and extending in a second direction perpendicular to the first direction, a first plug insulator located between the first bit line structure and the second bit line structure, and configured to contact a side surface extending in the second direction of the storage contact plug, and a plug isolation pattern located between the first bit line structure and the first plug insulator.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: July 12, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mong-Sup Lee, Byoung-Yong Gwak, Byung-Ho Kwak, Yoon-Kyung Kim, Tae-Joon Park, Byung-Sul Ryu, In-Seak Hwang
  • Publication number: 20150171163
    Abstract: Provided are a semiconductor device and a method of fabricating the same. The semiconductor device includes a first bit line structure extending in a first direction, a second bit line structure extending in the first direction and spaced apart from the first bit line structure, a storage contact plug located between the first bit line structure and the second bit line structure, and extending in a second direction perpendicular to the first direction, a first plug insulator located between the first bit line structure and the second bit line structure, and configured to contact a side surface extending in the second direction of the storage contact plug, and a plug isolation pattern located between the first bit line structure and the first plug insulator.
    Type: Application
    Filed: September 10, 2014
    Publication date: June 18, 2015
    Inventors: Mong-Sup LEE, Byoung-Yong GWAK, Byung-Ho KWAK, Yoon-Kyung KIM, Tae-Joon PARK, Byung-Sul RYU, In-Seak HWANG