Patents by Inventor ByungHyun Kwak

ByungHyun Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105569
    Abstract: An integrated package and a method for making the same are provided. The integrated package includes: a first substrate including: a first interconnection area having a plurality of first interconnection structures; and a first alignment structure disposed outside the first interconnection area; a second substrate stacked above the first substrate and including: a second interconnection area having a plurality of second interconnection structures; and a second alignment structure disposed outside the second interconnection area, wherein the second alignment structure is substantially aligned with the first alignment structure in a stacking direction of the first substrate and the second substrate; and a connecting element disposed between the first substrate and the second substrate and configured for electrically connecting at least one of the plurality of first interconnection structures with at least one of the plurality of second interconnection structures.
    Type: Application
    Filed: September 4, 2023
    Publication date: March 28, 2024
    Inventor: ByungHyun KWAK
  • Patent number: 9693455
    Abstract: A system and method of manufacture of an integrated circuit packaging system includes: a copper film; a first metal layer directly on the copper film; an insulation layer directly on and over the first metal layer, the insulation layer having a via hole through the insulation layer; a conductive via within the via hole and directly on the first metal layer; a second metal layer directly on the conductive via and the insulation layer; a copper post directly on the copper film; a solder pad over the copper post; and an interposer coupled to the copper post and the solder pad.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: June 27, 2017
    Assignee: STATS ChipPAC Pte. Ltd.
    Inventors: Seong Won Park, Hun Teak Lee, WoonJae Beak, MinJung Kim, ChangHwan Kim, ByungHyun Kwak, GwangTae Kim, HeeSoo Lee
  • Publication number: 20150318259
    Abstract: An integrated circuit packaging system, and a method of manufacture thereof, includes: an integrated circuit; a substrate having a substrate contact; an internal interconnect between the substrate and the integrated circuit, the internal interconnect is a no-reflow connection directly on the substrate contact and the integrated circuit; and an encapsulation over the internal interconnect.
    Type: Application
    Filed: April 27, 2015
    Publication date: November 5, 2015
    Inventors: KyungOe Kim, Seong Won Park, MinJung Kim, ChangHwan Kim, ByungHyun Kwak, WanIl Lee