Patents by Inventor Byungkook KONG

Byungkook KONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230260802
    Abstract: Exemplary semiconductor processing methods may include providing a fluorine-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may include at least one layer of silicon-containing material and at least one layer of silicon-and-germanium-containing material along the substrate. The methods may include forming a plasma of the fluorine-containing precursor and the hydrogen-containing precursor within the processing region. The methods may include contacting the at least one layer of silicon-containing material and the at least one layer of silicon-and-germanium-containing material with plasma effluents of the fluorine-containing precursor and the hydrogen-containing precursor.
    Type: Application
    Filed: February 17, 2022
    Publication date: August 17, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Daekyoung Kim, Ho Jeong Kim, Byungkook Kong, Sangwook Kim
  • Patent number: 10847368
    Abstract: A coating layer is deposited on a patterned feature on a first portion of a substrate. A second portion of the substrate outside the patterned feature is etched. The etching and the depositing are performed in a single pulsed plasma process using at least one of a pulsed source power signal and a pulsed bias power signal.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: November 24, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Byungkook Kong, Sangwook Kim, SeungHyun Park, Abhjeet Bagal, Kyoungjin Lee, Daksh Agarwal
  • Patent number: 10727075
    Abstract: Embodiments of the present disclosure generally provide a method and apparatus for forming features in a material layer utilizing EUV technologies. In one embodiment, a method of patterning a substrate includes disposing a patterned photoresist layer on a mask layer disposed on a substrate, wherein the patterned photoresist layer has openings with different widths defined in the patterned photoresist layer, forming a compensatory layer along sidewalls of the patterned photoresist layer to modify the widths of the openings and etching the mask layer through the openings with the modified width.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: July 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sang Wook Kim, Zhibin Wang, Kyoungjin Lee, Byungkook Kong
  • Patent number: 10580657
    Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 3, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chang Wook Doh, Zhibin Wang, Byungkook Kong, Sang Wook Kim, Sang-Jun Choi
  • Publication number: 20190371617
    Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.
    Type: Application
    Filed: July 9, 2019
    Publication date: December 5, 2019
    Inventors: Chang Wook DOH, Zhibin WANG, Byungkook KONG, Sang Wook KIM, Sang-Jun CHOI
  • Patent number: 10347500
    Abstract: Systems and methods discussed herein are directed towards processing of substrates, including forming a plurality of features in a target layer on a substrate. The formation of the plurality of features includes a main etch operation that forms the plurality of features to a first depth in the target layer. The main etch operation is followed by a phase shift sync pulsing (PSSP) operation, and these two operations are repeated iteratively to form the features to a predetermined depth. The PSSP operation includes one or more cycles of RF source power and RF bias power, this cycle deposits a protective coating in and on the features and then etches a portion of the protective coating to expose portions of the feature.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: July 9, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chang Wook Doh, Zhibin Wang, Byungkook Kong, Sang Wook Kim, Sang-Jun Choi
  • Publication number: 20190198338
    Abstract: Embodiments of the present disclosure generally provide a method and apparatus for forming features in a material layer utilizing EUV technologies. In one embodiment, a method of patterning a substrate includes disposing a patterned photoresist layer on a mask layer disposed on a substrate, wherein the patterned photoresist layer has openings with different widths defined in the patterned photoresist layer, forming a compensatory layer along sidewalls of the patterned photoresist layer to modify the widths of the openings and etching the mask layer through the openings with the modified width.
    Type: Application
    Filed: December 22, 2017
    Publication date: June 27, 2019
    Inventors: Sang Wook KIM, Zhibin WANG, Kyoungjin LEE, Byungkook KONG
  • Publication number: 20180292756
    Abstract: A coating layer is deposited on a patterned feature on a first portion of a substrate. A second portion of the substrate outside the patterned feature is etched. The etching and the depositing are performed in a single pulsed plasma process using at least one of a pulsed source power signal and a pulsed bias power signal.
    Type: Application
    Filed: April 7, 2017
    Publication date: October 11, 2018
    Inventors: Byungkook Kong, Sangwook Kim, SeungHyun Park, Abhijeet Bagal, Kyoungjin Lee, Daksh Agarwal
  • Patent number: 9627216
    Abstract: Embodiments of methods for forming features in a silicon containing layer of a substrate disposed on a substrate support are provided herein. In some embodiments, a method for forming features in a silicon containing layer of a substrate disposed on a substrate support in a processing volume of a process chamber includes: exposing the substrate to a first plasma formed from a first process gas while providing a bias power to the substrate support, wherein the first process gas comprises one or more of a chlorine-containing gas or a bromine containing gas; and exposing the substrate to a second plasma formed from a second process gas while no bias power is provided to the substrate support, wherein the second process gas comprises one or more of an oxygen-containing gas or nitrogen gas, and wherein a source power provided to form the first plasma and the second plasma is continuously provided.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: April 18, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Byungkook Kong, Hoon Sang Lee, Jinsu Kim, Ho Jeong Kim, Xiaosong Ji, Hun Sang Kim, Jinhan Choi
  • Patent number: 9418867
    Abstract: A gas comprising hydrogen is supplied to a plasma source. Plasma comprising hydrogen plasma particles is generated from the gas. A passivation layer is deposited on a first mask layer on a second mask layer over a substrate using the hydrogen plasma particles.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: August 16, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Byungkook Kong, Hung Sang Kim, Hoon Sang Lee, Jeong Hyun Yoo, Jun-Wan Kim
  • Patent number: 9390923
    Abstract: Methods for removing residual polymers formed during etching of a boron-doped amorphous carbon layer are provided herein. In some embodiments, a method of etching a feature in a substrate includes: exposing a boron doped amorphous carbon layer disposed on the substrate to a first plasma through a patterned mask layer to etch a feature into the boron doped amorphous carbon layer, wherein the first plasma is formed from a first process gas that reacts with the boron doped amorphous carbon layer to form residual polymers proximate a bottom of the feature; and exposing the residual polymers to a second plasma through the patterned mask layer to etch the residual polymers proximate the bottom of the feature, wherein the second plasma is formed from a second process gas comprising nitrogen (N2), oxygen (O2), hydrogen (H2), and methane (CH4).
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: July 12, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jeong Hyun Yoo, Hoon Sang Lee, Byungkook Kong
  • Patent number: 9299580
    Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: March 29, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Byungkook Kong, Gene Lee, Liming Yang
  • Patent number: 9287124
    Abstract: In one embodiment, a method is proposed for etching a boron dope hardmask layer. The method includes flowing a process gas comprising at least CH4 into a processing chamber. Forming a plasma in the process chamber from the process gas and etching the boron doped hardmask layer in the presence of the plasma. In other embodiments, the process gas utilized to etch the boron doped hardmask layer includes CH4, Cl2, SF6 and O2.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 15, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Byungkook Kong, Jun Wan Kim, Wonmo Ahn, Jeong Hyun Yoo, Hun Sang Kim
  • Publication number: 20160056050
    Abstract: Embodiments of the present disclosure provide methods for forming features in a film stack that may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method of etching a material layer disposed on a substrate using synchronized RF pulses includes providing an etching gas mixture into a processing chamber having a film stack disposed on a substrate, synchronously pulsing a RF source power and a RF bias power into the etching gas mixture at a ratio of less than 0.5, and etching the film stack disposed on the substrate.
    Type: Application
    Filed: August 19, 2014
    Publication date: February 25, 2016
    Inventors: Byungkook KONG, Gene LEE, Liming YANG
  • Publication number: 20160005602
    Abstract: Methods for removing residual polymers formed during etching of a boron-doped amorphous carbon layer are provided herein. In some embodiments, a method of etching a feature in a substrate includes: exposing a boron doped amorphous carbon layer disposed on the substrate to a first plasma through a patterned mask layer to etch a feature into the boron doped amorphous carbon layer, wherein the first plasma is formed from a first process gas that reacts with the boron doped amorphous carbon layer to form residual polymers proximate a bottom of the feature; and exposing the residual polymers to a second plasma through the patterned mask layer to etch the residual polymers proximate the bottom of the feature, wherein the second plasma is formed from a second process gas comprising nitrogen (N2), oxygen (O2), hydrogen (H2), and methane (CH4).
    Type: Application
    Filed: July 3, 2014
    Publication date: January 7, 2016
    Inventors: JEONG HYUN YOO, HOON SANG LEE, BYUNGKOOK KONG
  • Publication number: 20150200109
    Abstract: A gas comprising hydrogen is supplied to a plasma source. Plasma comprising hydrogen plasma particles is generated from the gas. A passivation layer is deposited on a first mask layer on a second mask layer over a substrate using the hydrogen plasma particles.
    Type: Application
    Filed: January 10, 2014
    Publication date: July 16, 2015
    Inventors: Byungkook Kong, Hung Sang Kim, Hoon Sang Lee, Jeong Hyun Yoo, Jun-Wan Kim
  • Patent number: 9064812
    Abstract: Embodiments of methods for etching a substrate include exposing the substrate to a first plasma formed from an inert gas; exposing the substrate to a second plasma formed from an oxygen-containing gas to form an oxide layer on a bottom and sides of a low aspect ratio feature and a high aspect ratio feature, wherein the oxide layer on the bottom of the low aspect ratio feature is thicker than on the bottom of the high aspect ratio feature; etching the oxide layer from the bottom of the low and high aspect ratio features with a third plasma to expose the bottom of the high aspect ratio feature while the bottom of the low aspect ratio feature remains covered; and exposing the substrate to a fourth plasma formed from a halogen-containing gas to etch the bottom of the low aspect ratio feature and the high aspect ratio feature.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: June 23, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jinsu Kim, Xiaosong Ji, Jinhan Choi, Ho Jeong Kim, Byungkook Kong, Hoon Sang Lee
  • Publication number: 20150099345
    Abstract: Embodiments of methods for forming features in a silicon containing layer of a substrate disposed on a substrate support are provided herein. In some embodiments, a method for forming features in a silicon containing layer of a substrate disposed on a substrate support in a processing volume of a process chamber includes: exposing the substrate to a first plasma formed from a first process gas while providing a bias power to the substrate support, wherein the first process gas comprises one or more of a chlorine-containing gas or a bromine containing gas; and exposing the substrate to a second plasma formed from a second process gas while no bias power is provided to the substrate support, wherein the second process gas comprises one or more of an oxygen-containing gas or nitrogen gas, and wherein a source power provided to form the first plasma and the second plasma is continuously provided.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 9, 2015
    Inventors: BYUNGKOOK KONG, HOON SANG LEE, JINSU KIM, HO JEONG KIM, XIAOSONG JI, HUN SANG KIM, JINHAN CHOI
  • Publication number: 20150064919
    Abstract: Embodiments of methods for etching a substrate include exposing the substrate to a first plasma formed from an inert gas; exposing the substrate to a second plasma formed from an oxygen-containing gas to form an oxide layer on a bottom and sides of a low aspect ratio feature and a high aspect ratio feature, wherein the oxide layer on the bottom of the low aspect ratio feature is thicker than on the bottom of the high aspect ratio feature; etching the oxide layer from the bottom of the low and high aspect ratio features with a third plasma to expose the bottom of the high aspect ratio feature while the bottom of the low aspect ratio feature remains covered; and exposing the substrate to a fourth plasma formed from a halogen-containing gas to etch the bottom of the low aspect ratio feature and the high aspect ratio feature.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 5, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Jinsu KIM, Xiaosong JI, Jinhan CHOI, Ho Jeong KIM, Byungkook KONG, Hoon Sang LEE
  • Publication number: 20150064914
    Abstract: In one embodiment, a method is proposed for etching a boron dope hardmask layer. The method includes flowing a process gas comprising at least CH4 into a processing chamber. Forming a plasma in the process chamber from the process gas and etching the boron doped hardmask layer in the presence of the plasma. In other embodiments, the process gas utilized to etch the boron doped hardmask layer includes CH4, Cl2, SF6 and O2.
    Type: Application
    Filed: September 2, 2014
    Publication date: March 5, 2015
    Inventors: Byungkook KONG, Jun Wan KIM, Wonmo AHN, Jeong Hyun YOO, Hun Sang KIM