Abstract: An air conditioner including a housing having an inlet and an outlet, a heat exchanger disposed inside the housing to exchange heat with air introduced into the inlet, a fan configured to blow air heat-exchanged in the heat exchanger to the outlet, and a speech recognizer including a microphone, a speaker, and a case accommodating the microphone and the speaker, and to operate the air conditioner using the microphone and the speaker.

Abstract: An apparatus and a method of compensating for an I/Q imbalance in a direct up-conversion system prevents the performance of the system from being deteriorated by efficiently compensating for an I/Q timing skew, an I/Q phase imbalance, and an I/Q gain imbalance by using a characteristic of an OFDM scheme in an Orthogonal Frequency Domain Multiple (Access) (OFDM(A)) system using a direct up-conversion scheme. According to the apparatus and the method of compensating for an I/Q imbalance in the direct up-conversion system of the present invention, an OFDM(A) system using a direct up-conversion scheme may efficiently compensate for I/Q timing skew, I/Q phase imbalance, and I/Q gain imbalance by using a characteristic of an OFDMA scheme, so that a performance of the system is prevented from being deteriorated.

Abstract: The present invention relates to an apparatus and a method for eliminating I/Q offset in a receiver of a SC-FDMA system which improves performance of the system by accurate measurement and cancellation of I/Q offset in a receiver of a SC-FDMA system operating in a 3GPP LTE uplink.

Abstract: An apparatus and a method of compensating for an I/Q imbalance in a direct up-conversion system prevents the performance of the system from being deteriorated by efficiently compensating for an I/Q timing skew, an I/Q phase imbalance, and an I/Q gain imbalance by using a characteristic of an OFDM scheme in an Orthogonal Frequency Domain Multiple (Access) (OFDM(A)) system using a direct up-conversion scheme. According to the apparatus and the method of compensating for an I/Q imbalance in the direct up-conversion system of the present invention, an OFDM(A) system using a direct up-conversion scheme may efficiently compensate for I/Q timing skew, I/Q phase imbalance, and I/Q gain imbalance by using a characteristic of an OFDMA scheme, so that a performance of the system is prevented from being deteriorated.

Abstract: The present invention relates to an apparatus and a method for eliminating I/Q offset in a receiver of a SC-FDMA system which improves performance of the system by accurate measurement and cancellation of I/Q offset in a receiver of a SC-FDMA system operating in a 3GPP LTE uplink.

Abstract: Disclosed herein are an apparatus and method for synchronizing a signal analyzer. The apparatus includes an Analog-to-Digital Converter (ADC), a signal storage unit, a trigger signal generation unit, a signal acquisition control unit, a signal analysis unit, and a time error control unit. The ADC converts the input signal into a corresponding digital signal. The signal storage unit stores therein the digital signal received from the ADC. The trigger signal generation unit generates a trigger signal for each predetermined period. the signal acquisition control unit acquires the digital signal from a signal acquisition time point. The signal analysis unit calculates the start position of a frame from the digital signal. The time error control unit calculates a time error between the time point at which each trigger signal is generated and the start position of the digital signal, and sets a subsequent signal acquisition time point based on the calculated time errors.

Abstract: Disclosed herein are an apparatus and method for synchronizing a signal analyzer. The apparatus includes an Analog-to-Digital Converter (ADC), a signal storage unit, a trigger signal generation unit, a signal acquisition control unit, a signal analysis unit, and a time error control unit. The ADC converts the input signal into a corresponding digital signal. The signal storage unit stores therein the digital signal received from the ADC. The trigger signal generation unit generates a trigger signal for each predetermined period. the signal acquisition control unit acquires the digital signal from a signal acquisition time point. The signal analysis unit calculates the start position of a frame from the digital signal. The time error control unit calculates a time error between the time point at which each trigger signal is generated and the start position of the digital signal, and sets a subsequent signal acquisition time point based on the calculated time errors.