Patents by Inventor C. C. Chang
C. C. Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079357Abstract: An integrated circuit (IC) device includes a redistribution line over a substrate, wherein a first angle between a topmost surface of the redistribution line and a sidewall of the redistribution line is within a first angle range, a second angle between a bottommost surface of the redistribution line and the sidewall of the redistribution line is within a second angle range, and the second angle range is different from the first angle range. The IC device further includes a passivation layer over the redistribution line, wherein a bottommost surface of the passivation layer is below the bottommost surface of the redistribution line.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Yi-An LIN, Alan KUO, C. C. CHANG, Yu-Lung SHIH
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Patent number: 11817404Abstract: An integrated circuit (IC) device includes a redistribution line over a substrate, wherein an entire sidewall of the redistribution line is curved. The IC device further includes a passivation layer over the redistribution line, wherein a distance from a bottommost surface of the passivation layer to the substrate is less than a distance from a bottommost surface of the redistribution line to the substrate. The IC device further includes a polymer layer over the passivation layer.Type: GrantFiled: August 5, 2021Date of Patent: November 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-An Lin, Alan Kuo, C. C. Chang, Yu-Lung Shih
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Publication number: 20210375802Abstract: An integrated circuit (IC) device includes a redistribution line over a substrate, wherein an entire sidewall of the redistribution line is curved. The IC device further includes a passivation layer over the redistribution line, wherein a distance from a bottommost surface of the passivation layer to the substrate is less than a distance from a bottommost surface of the redistribution line to the substrate. The IC device further includes a polymer layer over the passivation layer.Type: ApplicationFiled: August 5, 2021Publication date: December 2, 2021Inventors: Yi-An LIN, Alan KUO, C. C. CHANG, Yu-Lung SHIH
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Patent number: 11114395Abstract: An integrated circuit (IC) device includes a first passivation layer over a substrate. The IC device further includes a redistribution line over the first passivation layer, wherein the redistribution line has a barrel-shaped profile. The IC device further includes a second passivation layer over the redistribution line. The IC device further includes a polymer layer over the second passivation layer.Type: GrantFiled: October 21, 2019Date of Patent: September 7, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-An Lin, Alan Kuo, C. C. Chang, Yu-Lung Shih
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Publication number: 20210265292Abstract: A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device further includes a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity. The semiconductor device further includes a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity.Type: ApplicationFiled: May 13, 2021Publication date: August 26, 2021Inventors: Yu-Lung SHIH, Chao-Keng LI, Alan KUO, C. C. CHANG, Yi-An LIN
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Patent number: 11018100Abstract: A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device includes a dielectric layer over the conductive pad, wherein the dielectric layer comprises silicon oxide. The semiconductor device includes a first passivation layer directly over the dielectric layer, wherein the first passivation layer comprises silicon oxide. The semiconductor device includes a second passivation layer directly over the first passivation layer, wherein the second passivation layer comprises silicon nitride.Type: GrantFiled: May 13, 2019Date of Patent: May 25, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Lung Shih, Chao-Keng Li, Alan Kuo, C. C. Chang, Yi-An Lin
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Publication number: 20200051934Abstract: An integrated circuit (IC) device includes a first passivation layer over a substrate. The IC device further includes a redistribution line over the first passivation layer, wherein the redistribution line has a barrel-shaped profile. The IC device further includes a second passivation layer over the redistribution line. The IC device further includes a polymer layer over the second passivation layer.Type: ApplicationFiled: October 21, 2019Publication date: February 13, 2020Inventors: Yi-An LIN, Alan KUO, C. C. CHANG, Yu-Lung SHIH
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Patent number: 10453811Abstract: A method of manufacturing a semiconductor structure. The method includes depositing a conductive material over a substrate, and removing a portion of the conductive material to form a conductive structure having a barrel shape. A width of a body portion of the conductive structure is greater than a width of an upper portion and a width of a bottom portion of the conductive structure.Type: GrantFiled: May 1, 2017Date of Patent: October 22, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-An Lin, Alan Kuo, C. C. Chang, Yu-Lung Shih
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Publication number: 20190273056Abstract: A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device includes a dielectric layer over the conductive pad, wherein the dielectric layer comprises silicon oxide. The semiconductor device includes a first passivation layer directly over the dielectric layer, wherein the first passivation layer comprises silicon oxide. The semiconductor device includes a second passivation layer directly over the first passivation layer, wherein the second passivation layer comprises silicon nitride.Type: ApplicationFiled: May 13, 2019Publication date: September 5, 2019Inventors: Yu-Lung SHIH, Chao-Keng LI, Alan KUO, C. C. CHANG, Yi-An LIN
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Patent number: 10290596Abstract: A method of making a semiconductor device includes depositing a dielectric layer over a conductive pad using a first deposition process. The method further includes depositing a first passivation layer directly over the dielectric layer using a high density plasma chemical vapor deposition (HDPCVD). The first deposition process is different from HDPCVD. A thickness of the dielectric layer is sufficient to prevent charges generated by depositing the first passivation layer from reaching the conductive pad.Type: GrantFiled: June 8, 2017Date of Patent: May 14, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Lung Shih, Chao-Keng Li, Alan Kuo, C. C. Chang, Yi-An Lin
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Publication number: 20180166406Abstract: A method of making a semiconductor device includes depositing a dielectric layer over a conductive pad using a first deposition process. The method further includes depositing a first passivation layer directly over the dielectric layer using a high density plasma chemical vapor deposition (HDPCVD). The first deposition process is different from HDPCVD. A thickness of the dielectric layer is sufficient to prevent charges generated by depositing the first passivation layer from reaching the conductive pad.Type: ApplicationFiled: June 8, 2017Publication date: June 14, 2018Inventors: Yu-Lung SHIH, Chao-Keng LI, Alan KUO, C. C. CHANG, Yi-An LIN
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Publication number: 20180151520Abstract: A method of manufacturing a semiconductor structure. The method includes depositing a conductive material over a substrate, and removing a portion of the conductive material to form a conductive structure having a barrel shape. A width of a body portion of the conductive structure is greater than a width of an upper portion and a width of a bottom portion of the conductive structure.Type: ApplicationFiled: May 1, 2017Publication date: May 31, 2018Inventors: Yi-An LIN, Alan KUO, C. C. CHANG, Yu-Lung SHIH
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Patent number: 6413516Abstract: This invention relates to methods of preventing or reducing the severity of psoriasis. In one embodiment, the method involves administering to the individual a peptide having substantially the sequence of a non-conserved region sequence of a T cell receptor, present on the surface of T cells mediating psoriasis or a fragment thereof, wherein the peptide or fragment is capable of causing an effect on the immune system to regulate the T cells. In particular, the T cell receptor has the V&bgr; region-V&bgr;3, V&bgr;13.1 or V&bgr;17. In another embodiment, the method involves gene therapy. The invention also relates to methods of diagnosing psoriasis by determining the presence of psoriasis predominant T cell receptors.Type: GrantFiled: January 14, 1994Date of Patent: July 2, 2002Assignee: The Immune Response CorporationInventors: Jennie C. C. Chang, Steven W. Brostoff, Dennis J. Carlo
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Patent number: 5923393Abstract: A method of making a combined printed circuit board having a hollow portion or a through hole and an integrated circuit driver, wherein an external surface of the board and the driver is substantially planar. The method comprises steps of mounting the driver in the hollow portion, providing means temporarily for holding the driver in the hollow portion, encapsulating resin the driver with resin, and then removing the temporarily holding means.Type: GrantFiled: November 22, 1996Date of Patent: July 13, 1999Assignees: Varintelligent (BVI) Limited, Terrence Leslie JohnsonInventors: C. C. Chang, Kay Pui Ho
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Patent number: 5902452Abstract: The present invention discloses a method for etching a silicon surface or forming alignment marks in a silicon substrate by first coating the substrate with an oxide layer, then depositing and patterning a photoresist layer on top of the oxide layer and forming the alignment marks by a dry etching process utilizing fluorine/oxygen etchant chemistry for the simultaneous etching of the two layers in a single process wherein the oxide layer prevents the contamination of the silicon wafer by any silicon particles formed.Type: GrantFiled: March 13, 1997Date of Patent: May 11, 1999Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: M. C. Cheng, J. S. Liu, C. C. Chang
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Patent number: 5419923Abstract: A method for manufacturing tracing paper, comprising coating a plastic film with a coating material. The coating material comprises a solvent system, adhesives, writable inorganic pigments and surfactants. The solvent system contains 50-80% by weight of aliphatic solvent and 20-50% by weight of aromatic solvent. The coating material includes 20-60% by weight of solid components. The inorganic pigments are in an amount of 30-60% based on the weight of the solid components of the coating material.Type: GrantFiled: February 16, 1994Date of Patent: May 30, 1995Assignee: Shinkong Synthetic Fiber Corp.Inventors: Jeremiah Chen, C. C. Chang
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Patent number: 4953268Abstract: A dress fastener for fastening any two parts of a dress together, which includes a male member comprising a decorative button and a hook portion, and a female member comprising a retaining plate having two unitary screws respectively screwed up with two safety nuts. The male and female members are respectively secured to a dress at two opposite or corresponding parts thereof so that such two parts can be firmly secured together when the hook portion is connected to the retaining plate.Type: GrantFiled: January 10, 1990Date of Patent: September 4, 1990Inventor: C. C. Chang
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Patent number: 4426476Abstract: Textiles are rendered water and oil resistant by contacting them with a composition containing water-insoluble fluoroaliphatic radical- and aliphatic chlorine-containing ester and water-insoluble fluoroaliphatic radical-containing polymer.Type: GrantFiled: February 3, 1982Date of Patent: January 17, 1984Assignee: Minnesota Mining and Manufacturing CompanyInventor: John C. C. Chang
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Patent number: 3986526Abstract: A train of fluid pulses representative of a process variable is processed by digital fluidic circuits and is then converted into an analog fluid pressure signal which is compared to an analog command signal, the difference between the two compared signals being caused to appear in the form of a displacement. This displacement is amplified by means of a fluid servo system, the amplified output of which is utilized for directly driving a control element for a process.Type: GrantFiled: June 14, 1974Date of Patent: October 19, 1976Assignee: Sun Oil Company of PennsylvaniaInventors: Robert C. C. Chang, William M. Scott