Patents by Inventor Cécile Bory

Cécile Bory has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8647465
    Abstract: Gluing process for micro-structured substrates. The invention is applicable particularly to the fabrication of micro-fluidic components. In order to glue a micro-structured substrate having upper coplanar plane areas and recesses between them, a grid is placed above the substrate, the grid is coated with a glue, using a tool that presses on the grid and locally brings it into contact with the areas, so as to deposit a film of glue droplets on them, and the grid is removed. Furthermore, the upper coplanar plane areas are treated before the film of glue droplets is deposited, this treatment being designed to adapt wettability of these areas to the glue.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: February 11, 2014
    Assignees: Commissariat a l'Energie Atomique, Biomerieux S.A.
    Inventors: Isabelle Chartier, Cécile Bory, Patrick Pouteau
  • Patent number: 8314451
    Abstract: An organic field-effect transistor includes: source and drain electrodes; a semiconductor layer made of an organic semiconductor material placed at least between said source and drain electrodes; a gate electrode suitable for creating an electric field that increases the density of mobile charge carriers in the semiconductor layer in order to create a conduction channel in this semiconductor layer between the source and drain electrodes when a voltage VG is applied to the gate electrode; and an electrical insulator layer interposed between the gate electrode and the semiconductor layer, characterized in that it further includes a piezoelectric layer placed close to the conduction channel, in the semiconductor layer between the source and drain electrodes or on the opposite side of the gate electrode with respect to the electrical insulator and semiconductor layers, alongside the source and drain electrodes, said piezoelectric layer being electrically isolated from said source and drain electrodes and from the
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: November 20, 2012
    Assignee: Commissariat à l'Énergie Atomique et aux Énergies Alternatives
    Inventors: Mohammed Benwadih, Cécile Bory
  • Patent number: 8288267
    Abstract: A method for making an electric interconnection between two conducting layers, separated by at least one insulation or semi-conducting layer, which includes forming a stud extending between at least the lower conducting layer and the upper conducting layer, where the nature and/or the shape of the stud impart non-wettability properties relative to the material used for the separating layer.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: October 16, 2012
    Assignee: Commissariat a l'Energie Atomique et Aux Energies Alternatives
    Inventors: Jean-Marie Verilhac, Jacqueline Bablet, Cécile Bory
  • Publication number: 20100289015
    Abstract: An organic field-effect transistor includes: source and drain electrodes; a semiconductor layer made of an organic semiconductor material placed at least between said source and drain electrodes; a gate electrode suitable for creating an electric field that increases the density of mobile charge carriers in the semiconductor layer in order to create a conduction channel in this semiconductor layer between the source and drain electrodes when a voltage VG is applied to the gate electrode; and an electrical insulator layer interposed between the gate electrode and the semiconductor layer, characterized in that it further includes a piezoelectric layer placed close to the conduction channel, in the semiconductor layer between the source and drain electrodes or on the opposite side of the gate electrode with respect to the electrical insulator and semiconductor layers, alongside the source and drain electrodes, said piezoelectric layer being electrically isolated from said source and drain electrodes and from the
    Type: Application
    Filed: May 11, 2010
    Publication date: November 18, 2010
    Applicant: Commissariat à I'énergie atomique et aux énergies alternatives
    Inventors: Mohammed Benwadih, Cécile Bory
  • Publication number: 20100221909
    Abstract: This method for making an electric interconnection between two conducting layers separated by at least one insulation or semi-conducting layer, comprises forming a stud extending at least between the lower conducting layer and the upper conducting layer, wherein the nature and/or the shape of said stud impart non-wettability properties relative to the material used for the separating layer.
    Type: Application
    Filed: May 7, 2010
    Publication date: September 2, 2010
    Applicant: Commissariat A L'Energie Atomique et Aux Energies Alternatives
    Inventors: Jean-Marie VERILHAC, Jacqueline Bablet, Cécile Bory