Patents by Inventor C. F. Wang

C. F. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7135642
    Abstract: An integrated circuit carrier with conductive rings and a semiconductor device integrated with the carrier are proposed. A plurality of concave structures are formed on the conductive rings at predetermined positions above which a plurality of wires traverse, the wires being provided for electrically connecting the carrier to a semiconductor chip mounted on the carrier. Therefore, an insulating effect between the wires and the conductive rings is provided to prevent short circuit, so as to maintain the performance of the semiconductor device.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: November 14, 2006
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: C. F. Wang, Chang-Fu Chen
  • Publication number: 20050205990
    Abstract: An integrated circuit carrier with conductive rings and a semiconductor device integrated with the carrier are proposed. A plurality of concave structures are formed on the conductive rings at predetermined positions above which a plurality of wires traverse, the wires being provided for electrically connecting the carrier to a semiconductor chip mounted on the carrier. Therefore, an insulating effect between the wires and the conductive rings is provided to prevent short circuit, so as to maintain the performance of the semiconductor device.
    Type: Application
    Filed: September 21, 2004
    Publication date: September 22, 2005
    Inventors: C. F. Wang, Chang-Fu Chen
  • Publication number: 20040137327
    Abstract: The present embodiment relates to a method for preparing a composite graphite-silicon negative electrode material whereby an essentially dry mixture of graphite carbon powder and an element or elements selected from the new IUPAC Group Number 12-15 of the Periodic Table of Elements that can form alloys or compounds with lithium is prepared to provide an electrochemically active mixture. A mechanical agitation process serves to mix the constituent materials and to produce a fine dispersion with intimate contact between graphite and the Group 12-15 materials. A lithium ion battery negative electrode of this composition takes synergistic advantage of the high lithium capacity of some IUPAC Group materials and the long cycle-life of graphite negative electrode materials.
    Type: Application
    Filed: January 13, 2003
    Publication date: July 15, 2004
    Inventors: Karl J. Gross, James C.F. Wang, Gregory A. Roberts
  • Publication number: 20040070087
    Abstract: A semiconductor package and a fabrication method thereof are provided, in which a ground pad on a chip is electrically connected to a ground plane on a substrate by means of an electrically-conductive wall formed over a side surface of the chip and an electrically-conductive adhesive used for attaching the chip to the substrate. Therefore, a wire-bonding process is merely implemented for power pads and signal I/O (input/output) pads on the chip without having to form ground wires on the ground pads for electrical connection purposes. This benefit allows the use of a reduced number of bonding wires and simplifies wire arrangement or routability. And, a grounding path from the chip through the electrically-conductive wall and electrically-conductive adhesive to the substrate is shorter than the conventional one of using ground wires, thereby reducing a ground-bouncing effect and improving electrical performances of the semiconductor package.
    Type: Application
    Filed: May 30, 2003
    Publication date: April 15, 2004
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: C. F. Wang, Wen-Ta Tsai, Yuan-Ping Joe
  • Publication number: 20020151102
    Abstract: A method for manufacturing films used in semiconductor package, comprising the steps of: providing a frame having an upper surface and a lower surface opposite to the upper surface, a through-hole being formed in the frame; mounting a first covering layer onto the lower surface of the frame in order to covering the through-hole; placing a film into the through-hole of the frame, the film being adhered onto the first covering layer; providing a second covering layer for covering the frame and packing the film, the film being located between the first covering layer and the second covering layer; and cutting the film into a plurality of films each having a predetermined size by a cutting tool. The films after being cut may be placed between the lower semiconductor chip and the upper semiconductor chip, so that the plurality of wirings and the lower semiconductor chip are free from being short-circuited, and the bad signal transmission can be avoided.
    Type: Application
    Filed: April 16, 2001
    Publication date: October 17, 2002
    Inventors: Jichen Wu, Meng Ru Tsai, Nai Hua Yeh, Chen Pin Peng, C.F. Wang, Wen Tsan Lee
  • Publication number: 20020132866
    Abstract: A method and composition for removing perchlorate from a highly selective ion exchange resin is disclosed. The disclosed approach comprises treating the resin in a solution of super critical or liquid carbon dioxide and one or more quaternary ammonium chloride surfactant compounds.
    Type: Application
    Filed: January 14, 2002
    Publication date: September 19, 2002
    Inventors: William R. Even, Jennifer A. Irvin, Edward E. Tarver, Gilbert M. Brown, James C. F. Wang
  • Publication number: 20020096754
    Abstract: A stacked structure of integrated circuits for electrically connecting to a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, and an upper integrated circuit. The lower integrated circuit has a lower surface and an upper surface. The lower surface is adhered onto the first surface of the substrate. A plurality of bonding pads are formed on the upper surface. The wirings each has a first end and a second end. The first ends of the wirings are electrically connected to the bonding pads of the lower integrated circuit. The second ends of the wirings are electrically connected to the signal input terminals of the substrate. The upper integrated circuit has a lower surface and an upper surface. Two recesses are formed at two sides of the lower surface. The upper integrated circuit is adhered to the upper surface of the lower integrated circuit so as to stack above the lower integrated circuit.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, C. F. Wang, Chen Pin Peng, Wen Tsan Lee, Jichen Wu
  • Publication number: 20020096766
    Abstract: A package structure for an integrated circuit includes a substrate, an integrated circuit, an adhesive layer, a plurality of wirings, and a glue layer. The substrate has a first surface and a second surface. The first surface is formed with a plurality of signal input terminals. The second surface is formed with a plurality of signal output terminals for electrically connecting to the circuit board. The integrated circuit has a lower surface and an upper surface. Recesses are formed at two sides of the lower surface, and a plurality of bonding pads are formed on the upper surface. The adhesive layer is used for adhering the lower surface of the integrated circuit to the first surface of the substrate. The wirings are electrically connecting to the bonding pads of the integrated circuit and to the signal input terminals of the substrate. The glue layer is used for sealing the plurality of wirings and the integrated circuits.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, C. F. Wang, Chen Pin Peng, Wen Tsan Lee, Jichen Wu
  • Patent number: 6407143
    Abstract: A method and composition for removing perchlorate from a highly selective ion exchange resin is disclosed. The disclosed approach comprises treating the resin in a solution of super critical or liquid carbon dioxide and one or more quaternary ammonium chloride surfactant compounds.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: June 18, 2002
    Assignee: Sandia Corporation
    Inventors: William R. Even, David J. Irvin, Jennifer A. Irvin, Edward E. Tarver, Gilbert M. Brown, James C. F. Wang
  • Patent number: 5882621
    Abstract: A method of producing carbon materials for use as electrodes in rechargeable batteries. Electrodes prepared from these carbon materials exhibit intercalation efficiencies of .apprxeq.80% for lithium, low irreversible loss of lithium, long cycle life, are capable of sustaining a high rates of discharge and are cheap and easy to manufacture. The method comprises a novel two-step stabilization process in which polymeric precursor materials are stabilized by first heating in an inert atmosphere and subsequently heating in air. During the stabilization process, the polymeric precursor material can be agitated to reduce particle fusion and promote mass transfer of oxygen and water vapor. The stabilized, polymeric precursor materials can then be converted to a synthetic carbon, suitable for fabricating electrodes for use in rechargeable batteries, by heating to a high temperature in a flowing inert atmosphere.
    Type: Grant
    Filed: May 9, 1997
    Date of Patent: March 16, 1999
    Assignee: Sandia Corporation
    Inventors: Narayan Doddapaneni, James C. F. Wang, Robert W. Crocker, David Ingersoll, David W. Firsich
  • Patent number: 5426006
    Abstract: A secondary battery having a rechargeable lithium-containing anode, a cathode and a separator positioned between the cathode and anode with an organic electrolyte solution absorbed therein is provided. The anode comprises three-dimensional microporous carbon structures synthesized from polymeric high internal phase emulsions or materials derived from this emulsion source, i.e., granules, powders, etc.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: June 20, 1995
    Assignee: Sandia Corporation
    Inventors: Frank M. Delnick, William R. Even, Jr., Alan P. Sylwester, James C. F. Wang, Thomas Zifer
  • Patent number: 4441816
    Abstract: A method for in situ measurement of particle size is described. The size information is obtained by scanning an image of the particle across a double-slit mask and observing the transmitted light. This method is useful when the particle size of primary interest is 3 .mu.m and larger. The technique is well suited to applications in which the particles are non-spherical and have unknown refractive index. It is particularly well suited to high temperature environments in which the particle incandescence provides the light source.
    Type: Grant
    Filed: March 25, 1982
    Date of Patent: April 10, 1984
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: Kenneth R. Hencken, Daniel A. Tichenor, James C. F. Wang