Patents by Inventor C.H. Loa

C.H. Loa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050127432
    Abstract: A method of manufacturing a semiconductor device, wherein a gate structure is formed over a substrate, an interconnect layer is formed over the gate structure and the substrate, and a cap layer is formed over the interconnect layer. The interconnect layer and the cap layer are then planarized to form a substantially planar surface. A mask layer, such as an oxide mask layer, is formed over the planarized portions of the interconnect layer, and the planarized cap layer and portions of the interconnect layer are removed by etching around the mask layer.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 16, 2005
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Yi Yu, C.H. Loa, J.H. Tsai