Abstract: An electronic device may include a display panel and a display driver. The display panel may include multiple pixels each receiving a supply voltage and a respective data voltage to emit light. The display driver may include a low drop-out regulator (LDO) to provide the supply voltage to the pixels. The LDO may operate in a normal operation mode and a hard park mode. In the normal operation mode, the LDO may generate the supply voltage based on receiving a reference voltage and a bias voltage within a bias voltage range to operate in the normal operation mode. In the hard park mode, the LDO may become idle (e.g., shut-down mode) based on receiving a hard park mode voltages from dedicated replacement circuits. For example, including the dedicated reference voltage replacement circuit with the display driver may improve reliability and efficiency of the electronic device when de-energizing the LDO.

Abstract: Local passive matrix displays and methods of operation are described. In an embodiment, the display includes a pixel driver chip coupled with a matrix of rows and columns of LEDs. The pixel driver chips may be arranged in rows across the display with separate portions to operate separate matrices of LEDs.

Abstract: An electronic device may have a display. The display may include an array of pixels formed on a silicon substrate. Display driver circuitry may be formed in a display driver integrated circuit that outputs display data and other control signals for operating the display. An interposer structure may be included in the electronic device. The interposer structure may be attached to the silicon display substrate and may only partially overlap the silicon display substrate. The display driver integrated circuit may be attached to the interposer structure and provide signals to the display pixels through the interposer structure. In another possible arrangement, the display driver integrated circuit may bridge a gap between the silicon display substrate and the flexible printed circuit. The display driver integrated circuit only partially overlaps the silicon display substrate in this arrangement.

Abstract: Hybrid architectures and method methods of operating a display panel are described. In an embodiment, row driver and pixel driver functions are combined in a group of backbone hybrid pixel driver chips, wherein global signal lines are distributed to the backbone hybrid pixel driver chips, where the global signals are manipulated and distributed to a row of pixel driver chips.

Abstract: An integrated touchscreen can include light emitting diodes or organic light emitting diodes (LEDs/OLEDs), display chiplets and touch chiplets disposed in a visible area of the integrated touch screen. For example, the LEDs/OLEDs, display chiplets and touch chiplets can be placed on a substrate by a micro-transfer tool. The integrated touchscreen can also include electrodes disposed in the visible area of the integrated touch screen. The electrodes can be capable of providing display functionality via the one or more display chiplets during display operation (e.g., operating as cathode terminals of the LEDs during the display operation) and capable of providing touch functionality via the touch chiplets during touch operation (e.g., touch node electrodes can be formed from groups of the electrodes and sensed). In some examples, the touch node electrodes can be formed and coupled to touch chiplets via the display chiplets.

Abstract: An end effector including a first deformable element having a proximal end and a distal end, and a second deformable element having a proximal end and a distal end. The first and second deformable elements can be mechanically coupled at the respective distal ends. At least one movable member can mechanically interact with and increase structural strength of at least one of the first and second deformable elements between the respective proximal ends and distal ends upon actuation of at least one of the first and second deformable elements. The first and second deformable elements can each have an area moment of inertia that enables cooperative operation of tension and compression. An actuating arrangement can be included to which at least one of the first and second deformable elements can be coupled at the respective proximal end.

Abstract: Systems and methods may reduce or eliminate image artifacts due to a defective pixel of an electronic display. An electronic display may include pixels that respectively include a self-emissive element, pixel drive circuitry that supplies a pixel drive current to drive the self-emissive element, and signal routing circuitry that reduces or eliminates a visual artifact due to a defective pixel among the pixels. The signal routing circuitry may do this by turning off the self-emissive element, supplying image data from the pixel drive circuitry to a first adjacent pixel, or receiving image data from other pixel drive circuitry from the first adjacent pixel or a second adjacent pixel.

Abstract: A first die has a port to couple the first die to a second die over a die-to-die interconnect. The port includes circuitry to implement a physical layer of the die-to-die interconnect, send first protocol identification data over the physical layer to identify a first protocol in a plurality of protocols, send first data over the interconnect to the second die, wherein the first data comprise data of the first protocol, send second protocol identification data over the physical layer to identify a different second protocol in the plurality of protocols, and send second data over the interconnect to the second die, wherein the second data comprise flits of the second protocol.

Abstract: Hybrid architectures and method methods of operating a display panel are described. In an embodiment, row driver and pixel driver functions are combined in a group of backbone hybrid pixel driver chips, wherein global signal lines are distributed to the backbone hybrid pixel driver chips, where the global signals are manipulated and distributed to a row of pixel driver chips.

Abstract: A shared memory controller receives a flit from another first shared memory controller over a shared memory link, where the flit includes a node identifier (ID) field and an address of a particular line of the shared memory. The node ID field identifies that the first shared memory controller corresponds to a source of the flit. Further, a second shared memory controller is determined from at least the address field of the flit, where the second shared memory controller is connected to a memory element corresponding to the particular line.

Abstract: Touch sensitive display technologies (e.g., integrated touch-display pixel-based systems) are evolving to contain more analog and digital circuits inside the panel itself instead of the traditionally simple thin-film transistors. This improves the display characteristics but makes those circuits more vulnerable to the impact of external ESD strikes, which can degrade the user experience. This disclosure describes a series of circuits and techniques to mitigate the impact of these discharges on front of screen artifacts and potential false touches. These circuits and techniques may include: performing configuration-only panel updates independently of the image refresh rate, improving the in-panel memory circuits to make them resistant to unexpected pin toggles via disabling of a write path in response to a read clock, implementing a pin corruption detector and implementing a supply injection detector.

Abstract: An integrated touchscreen can include light emitting diodes or organic light emitting diodes (LED s/OLEDs), display chiplets and touch chiplets disposed in a visible area of the integrated touch screen. For example, the LEDs/OLEDs, display chiplets and touch chiplets can be placed on a substrate by a micro-transfer tool. The integrated touchscreen can also include electrodes disposed in the visible area of the integrated touch screen. The electrodes can be capable of providing display functionality via the one or more display chiplets during display operation (e.g., operating as cathode terminals of the LEDs during the display operation) and capable of providing touch functionality via the touch chiplets during touch operation (e.g., touch node electrodes can be formed from groups of the electrodes and sensed). In some examples, the touch node electrodes can be formed and coupled to touch chiplets via the display chiplets.

Abstract: An interface couples a controller to a physical layer (PHY) block, where the interface includes a set of data pins comprising transmit data pins to send data to the PHY block and receive data pins to receive data from the PHY block. The interface further includes a particular set of pins to implement a message bus interface, where the controller is to send a write command to the PHY block over the message bus interface to write a value to at least one particular bit of a PHY message bus register, bits of the PHY message bus register are mapped to a set of control and status signals, and the particular bit is mapped to a recalibration request signal to request that the PHY block perform a recalibration.

Abstract: Embodiments disclosed herein provide systems and methods for testing and repairing various aspects of an electronic display. The electronic display includes a reference array and an active array. The electronic display also includes test circuitry used to test individual or any combination of pixels of the electronic display. Switches may be disposed between the pixels and the test circuitry to be to repair the various components of the electronic display.

Abstract: Local passive matrix displays and methods of operation are described. In an embodiment, the display includes a pixel driver chip coupled with a matrix of rows and columns of LEDs. The pixel driver chips may be arranged in rows across the display with separate portions to operate separate matrices of LEDs.

Abstract: An integrated touchscreen can include light emitting diodes or organic light emitting diodes (LEDs/OLEDs), display chiplets and touch chiplets disposed in a visible area of the integrated touch screen. For example, the LEDs/OLEDs, display chiplets and touch chiplets can be placed on a substrate by a micro-transfer tool. The integrated touchscreen can also include electrodes disposed in the visible area of the integrated touch screen. The electrodes can be capable of providing display functionality via the one or more display chiplets during display operation (e.g., operating as cathode terminals of the LEDs during the display operation) and capable of providing touch functionality via the touch chiplets during touch operation (e.g., touch node electrodes can be formed from groups of the electrodes and sensed). In some examples, the touch node electrodes can be formed and coupled to touch chiplets via the display chiplets.

Abstract: A shared memory controller receives a flit from another first shared memory controller over a shared memory link, where the flit includes a node identifier (ID) field and an address of a particular line of the shared memory. The node ID field identifies that the first shared memory controller corresponds to a source of the flit. Further, a second shared memory controller is determined from at least the address field of the flit, where the second shared memory controller is connected to a memory element corresponding to the particular line. The flit is forwarded to the second shared memory controller using a shared memory link according to a routing path.

Abstract: Embodiments may be generally direct to apparatuses, systems, method, and techniques to provide multi-interconnect protocol communication. In an embodiment, an apparatus for providing multi-interconnect protocol communication may include a component comprising at least one connector operative to connect the component to at least one off-package device via a standard interconnect protocol, and logic, at least a portion of the logic comprised in hardware, the logic to determine data to be communicated via a multi-interconnect protocol, provide the data to a multi-protocol multiplexer to determine a route for the data, route the data on-package responsive to the multi-protocol multiplexer indicating a multi-interconnect on-package mode, and route the data off-package via the at least one connector responsive to the multi-protocol multiplexer indicating a multi-interconnect off-package mode. Other embodiments are described.

Abstract: Systems, methods, and devices can involve a host device that includes a root complex, a link, and an interconnect protocol stack coupled to a bus link. The interconnect protocol stack can include multiplexing logic to select one of a Peripheral Component Interconnect Express (PCIe) upper layer mode, or an accelerator link protocol upper layer mode, the PCIe upper layer mode or the accelerator link protocol upper layer mode to communicate over the link, and physical layer logic to determine one or more low latency features associated with one or both of the PCIe upper layer mode or the accelerator link protocol upper layer mode.

Abstract: Hybrid architectures and method methods of operating a display panel are described. In an embodiment, row driver and pixel driver functions are combined in a group of backbone hybrid pixel driver chips, wherein global signal lines are distributed to the backbone hybrid pixel driver chips, where the global signals are manipulated and distributed to a row of pixel driver chips.