Patents by Inventor C. K. Wang

C. K. Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5965938
    Abstract: A semiconductor structure is disclosed where the topography of the semiconductor substrate is improved by forming a two-tiered via. The two-tiered structure has a top portion and a bottom portion. PECVD-oxide is disposed in the top portion on top of a blanket metal layer formed in the bottom portion. The oxide layer in the top portions is planarized to a level such that all such structures are planar with respect to each other. In other words, the leveled surface thereover offers a uniformly flat depth-of-field which in turn makes possible the use of submicron opto-lithographic tools for the ultra high density integrated circuit chips. At a later process step, a tungsten via plug replaces the PECVD-oxide in the top portion, thus resulting in a two-tiered structure comprising a portion of the metal blanket metal in the bottom portion and the tungsten via-plug in the top portion.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: October 12, 1999
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: C. K. Wang, L. M. Liu