Abstract: An exemplary embodiment of the present disclosure illustrates a clock rate control method. Firstly, a usage of a first input first output (FIFO) buffer in an electronic device is detected. Then, whether the usage falls within a first specific interval is determined, wherein the first specific interval has a first upper limit value and a first lower limit value. When the usage is larger than the first upper limit value, a clock rate of the inner device of the electronic device is increased; when the usage is less than the first lower limit value, the clock rate is decreased.