Patents by Inventor C. S. Cheng

C. S. Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9482851
    Abstract: A wide-angle lens is disclosed. The wide-angle lens includes a first lens element L1, a second lens element L2, a third lens element L3, an aperture diaphragm S, a fourth lens element L4 and a fifth lens element L5 arranged from an object plane to an image plane. The first element L1 is a meniscus lens element having a negative focal power and protruding toward the object plane, the second element L2 is a meniscus lens element having a negative focal power and protruding toward the object plane, the third element L3 is a meniscus lens element having a positive focal power and protruding toward the image plane, the fourth element L4 is a meniscus lens element having a negative focal power and protruding toward the object plane, and the fifth element L5 is a lens element having a positive focal power.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: November 1, 2016
    Assignee: SIRTEC INTERNATIONAL (SUZHOU) CO. LTD
    Inventors: Satoshi Do, C. S. Cheng
  • Patent number: 9063172
    Abstract: A method for creating step connectors in a test fixture is disclosed. The method generally includes steps (A) and (B). Step (A) may form the connectors in a plurality of regions of a board by reducing a thickness of a metal outside the regions by a distance. Each region generally corresponds to a respective one of a plurality of pads of a package of a device under test. The distance may be measured normal to the board. The distance generally provides a clearance between the board and the package sufficient to make physical and electrical contact between the connectors and the pads. Step (B) may form a plurality of traces on the board. Each trace may (i) be made of the metal and (ii) intersect a respective one of the regions.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: June 23, 2015
    Assignee: M/A-COM Technology Solutions Holdings, Inc.
    Inventors: Anson C. S. Cheng, Lung-Hung Ni
  • Patent number: 6642554
    Abstract: A memory module structure of the invention is used for being assembled on a locking device. The memory module includes a substrate and a plurality of memories. The substrate has certain long sides and short sides. Notches are formed on the short sides for being secured by the locking device. Each of the plurality of memories has a suitable length and width. Some memories of the plurality of memories are transversely mounted on the substrate with respect to the substrate. The other memories of the plurality of memories are longitudinally mounted on the substrate with respect to the substrate. According to this structure, it is possible to suitably arrange a plurality of memories on the substrate so as to increase the memory capacity of the memory module.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: November 4, 2003
    Assignee: Kingpak Technology, Inc.
    Inventors: Nai Hua Yeh, Chen Pin Peng, Chief Lin, C. S. Cheng, Kuang Yu Fan, Ren Long Kau, Fu Yung Huang, Yves Huang, Wu Hsiang Lee, Chih Hsien Chung, May Chen
  • Publication number: 20030118680
    Abstract: A jig structure for an integrated circuit package. The jig structure is used for integrated circuits to be covered by glue. The jig structure includes a base formed with a plurality of receiving regions for receiving the integrated circuits, a mold plate covering the base, a plurality of glue inlets formed on the mold plate at locations corresponding to each receiving region on the base, and a projection arranged between each glue inlet and its corresponding receiving region. The projection blocks and buffers the glue entering the receiving regions from the glue inlets. According to the jig structure, the mold flow of the glue can be effectively buffered when the glue is poured. Thus, it is not necessary to redesign the jig with the change of the relative position relationships between the glue inlets and the integrated circuits. The jig of this invention can be widely used for packaging various integrated circuits having different sizes and specifications.
    Type: Application
    Filed: December 20, 2001
    Publication date: June 26, 2003
    Inventors: Chief Lin, C. S. Cheng, Allis Chen
  • Publication number: 20020096758
    Abstract: A packaging structure of an image sensor includes a substrate, an image sensing chip, a plurality of wirings, and a transparent layer. The substrate includes a plurality of metal sheets, glue for sealing the metal sheets, a first surface, and a second surface. The metal sheets are exposed to the outside via the first surface and the second surface to form first contacts and second contacts, respectively. The image sensing chip is mounted on the substrate. The plurality of bonding pads are formed on the image sensing chip. The plurality of wirings electrically connect the bonding pads on the image sensing chip to the first contacts of the first surface of the substrate, in order to electrically connect the image sensing chip to the substrate. The transparent layer is arranged above the image sensing chip. Therefore, a packaging structure of an image sensor made of plastic materials can be formed, thereby simplifying the packaging processes and lowering the manufacturing costs.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 25, 2002
    Inventors: Mon Nan Ho, Hsiu Wen Tu, C. S. Cheng, Li Huan Chen, Joe Liu, Jichen Wu, Wen Chuan Chen
  • Publication number: 20020096747
    Abstract: A package structure of an integrated circuit is used for electrically connecting to a printed circuit board includes a substrate, an integrated circuit, a plurality of wires, two molded resins. The substrate has a lower surface formed with signal input terminals and signal output terminals, which are to be connected to the signal input terminals. The signal output terminals are electrically connected to the printed circuit board. The integrated circuit has a lower surface for mounting the integrated circuit to the upper surface of the substrate. The two sides on the lower surface of the integrated circuit formed with a plurality of bonding pads. While the integrated circuit mounted to the substrate, the bonding pads are exposed to the outside. The plurality of wires are electrically connected the bonding pads to the substrate. Thus, the signals from the integrated circuit can be transmitted to the substrate.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Nai Hua Yeh, Kuang Yu Fan, Mon Nan Ho, C. S. Cheng, C. H. Chen, Fu Yung Huang, Yung Sheng Chiu
  • Publication number: 20020096761
    Abstract: A structure of stacked integrated circuits arranged on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a passivation layer, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals, and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface and a second surface. The first surface of the lower integrated circuit is adhered onto the first surface of the substrate. The second surface of the lower integrated circuit is formed with a plurality of bonding pads. The wirings each includes a first end and a second end opposite to the first end. The first ends of the wirings are electrically connected to the bonding pads of the lower integrated circuit, and the second ends of the wirings are electrically connected to the signal input terminals of the substrate, respectively.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
  • Publication number: 20020096762
    Abstract: A structure of stacked integrated circuits for mounting on a circuit board includes a substrate, a lower integrated circuit, a plurality of wirings, a plurality of metallic balls, and an upper integrated circuit. The substrate has a first surface formed with signal input terminals and a second surface formed with signal output terminals for electrically connecting to the circuit board. The lower integrated circuit has a first surface adhered to the first surface of the substrate and a second surface formed with a plurality of bonding pads. Each of the wirings has a first end and a second end away from the first end. The first ends are electrically connected to the bonding pads of the lower integrated circuit. The second ends are electrically connected to the signal input terminals on the first surface of the substrate. The plurality of metallic balls are formed on the second surface of the lower integrated circuit.
    Type: Application
    Filed: January 24, 2001
    Publication date: July 25, 2002
    Inventors: Wen Chuan Chen, Kuo Feng Peng, C. H. Chou, Allis Chen, Nai Hua Yeh, Yen Cheng Huang, Fu Yung Huang, Chief Lin, C. S. Cheng
  • Publication number: 20020096763
    Abstract: A packaging structure of an image sensor includes a plurality of metal sheets, an image sensing chip, and transparent glue. Each of the metal sheets has a first surface and a second surface. The image sensing chip is electrically connecting to the plurality of first surfaces of the metal sheets. The transparent glue is for covering the metal sheets and the image sensing chip is capable of receiving optical signals. The second surfaces of the metal sheets bonded by the transparent glue are exposed to the outside so as to form signal output terminals for the image sensor. A method for packaging the structure is also disclosed.
    Type: Application
    Filed: January 23, 2001
    Publication date: July 25, 2002
    Inventors: Mon Nan Ho, Hsiu Wen Tu, C. S. Cheng, Li Huan Chen, Joe Liu, Jichen Wu, Wen Chuan Chen