Abstract: A device fault diagnosis system includes: a data sampling chip, a first memory, and a processor, wherein the data sampling chip includes a plurality of data collection channels; the data sampling chip collects working data of monitoring positions electrically connected to respective data collection channels, in a device to be monitored, through the respective data collection channels; when determining that the working data of a first monitoring position is abnormal, generates an interrupt signal corresponding to the first monitoring position; and transmits the interrupt signal to the first memory; the first memory stores the working data of the first monitoring position within a preset time period starting from a moment when the interrupt signal is received, into a preset position; and the processor periodically polls the data sampling chip, and after determining that the data sampling chip generates the interrupt signal, reads the working data from the preset position.

Abstract: The present application discloses a CPU performance adjustment method and apparatus, and a medium. The method includes: determining, by a baseboard management controller (BMC), a rated power of a power supply unit (PSU) powering a current central processing unit (CPU); outputting, by a complex programmable logic device (CPLD), a control signal corresponding to the rated power; outputting, by a preset conversion unit, a voltage value corresponding to the control signal; and determining, based on the voltage value and a first preset mapping relationship, a maximum operating frequency of the CPU in an overclocking state, the first preset mapping relationship is a corresponding relationship between voltage ranges and maximum operating frequencies.