Patents by Inventor Calogero Marco Ippolito

Calogero Marco Ippolito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200264648
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco IPPOLITO, Mario CHIRICOSTA
  • Publication number: 20200256898
    Abstract: An amplification interface includes an input terminal receiving a sensor current and an output terminal supplying an output voltage. An analog integrator is connected to the input terminal and supplies the output voltage. A current generator is connected to the input of the analog integrator and generates a compensation current based on a drive signal. A control circuit generates the drive signal for the current generator based on a control signal representing an offset in the sensor current supplied by the sensor. The current generator generates, based on the driving signal, a positive or negative current. The control circuit determines a first duration and a second duration as a function of the control signal representing the offset in the sensor current, during the measurement interval, and sets the driving signal to a first logic value for the first duration and to a second logic value for the second duration.
    Type: Application
    Filed: February 4, 2020
    Publication date: August 13, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Michele VAIANA, Calogero Marco IPPOLITO, Angelo RECCHIA, Antonio CICERO, Pierpaolo LOMBARDO
  • Publication number: 20200259474
    Abstract: An amplification interface includes a drain of a first FET connected to a first node, a drain of a second FET connected to a second node, and sources of the first and second FETs connected to a third node. First and second bias-current generators are connected to the first and second nodes. A third FET is connected between the third node and a reference voltage. A regulation circuit drives the gate of the third FET to regulate the common mode of the voltage at the first node and the voltage at the second node to a desired value. A current generator applies a correction current to the first and/or second node. A differential current integrator has a first and second inputs connected to the second and first nodes. The integrator supplies a voltage representing the integral of the difference between the currents received at the second and first inputs.
    Type: Application
    Filed: February 4, 2020
    Publication date: August 13, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco IPPOLITO, Michele VAIANA, Angelo RECCHIA
  • Patent number: 10678289
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: June 9, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Publication number: 20200050305
    Abstract: A touchscreen resistive sensor includes a network of resistive sensor branches coupled to a number of sensor nodes arranged at touch locations of the touchscreen. A test sequence is performed by sequentially applying to each sensor node a reference voltage level, jointly coupling to a common line the other nodes, sensing a voltage value at the common line, and declaring a short circuit condition as a result of the voltage value sensed at the common line reaching a short circuit threshold. A current value level flowing at the sensor node to which the reference voltage level is applied is sensed and a malfunction of the resistive sensor branch coupled with the sensor node to which a reference voltage level is applied is generated as a result of the current value sensed at the sensor node reaching an upper threshold or lower threshold.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 13, 2020
    Inventors: Calogero Marco Ippolito, Angelo Recchia, Antonio Cicero, Pierpaolo Lombardo, Michele Vaiana
  • Publication number: 20190316973
    Abstract: A circuit includes a first current source configured to produce a first current in a first current line through a first diode-connected transistor having a voltage drop across the first diode-connected transistor, the first current being proportional to an absolute temperature via a first proportionality factor; a second current source configured to produce a second current in a second current line through a second diode-connected transistor having a voltage drop across the second diode-connected transistor, the second current being proportional to the absolute temperature via a second proportionality factor; a third current source configured to produce a third current in a third current line through a third diode-connected transistor having a voltage drop across the third diode-connected transistor; and a processing network including a sigma-delta analog-to-digital converter, the processing network being coupled to the, the second, and the third diode-connected transistors.
    Type: Application
    Filed: March 18, 2019
    Publication date: October 17, 2019
    Inventors: Calogero Marco Ippolito, Michele Vaiana
  • Publication number: 20190072994
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference comprising a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Application
    Filed: November 7, 2018
    Publication date: March 7, 2019
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Patent number: 10152079
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 11, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Publication number: 20180313699
    Abstract: A circuit includes a first input terminal, a second input terminal, a third input terminal and an output terminal. A first summation node adds signals at the first and third input terminals. A second summation node subtracts signals at the second and third input terminals. A selector selects between the added signals and subtracted signals in response to a selection signal. The output of the selector is integrated to generate an integrated signal. The integrated signal is compared by a comparator to a threshold, the comparator generating an output signal at the output terminal having a first level and a second level. Feedback of the output signal produces the selection signal causing the selector to select the added signals in response to the first level of the output signal and causing the selector to select the subtracted signals in response to the second level of the output signal.
    Type: Application
    Filed: April 20, 2018
    Publication date: November 1, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Michele VAIANA, Paolo PESENTI, Mario CHIRICOSTA, Calogero Marco IPPOLITO, Mario MAIORE
  • Publication number: 20180299920
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference comprising a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Application
    Filed: June 13, 2018
    Publication date: October 18, 2018
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Publication number: 20180212514
    Abstract: An embodiment circuit includes a charge pump configured to receive an input voltage at an input terminal, and a clock signal at a clock input, the charge pump being further configured to produce a first output voltage that is a multiple of the input voltage by a factor N. The circuit further includes an input stage including a reference terminal configured to receive a reference voltage, and an output terminal configured to provide the input voltage to the charge pump. The circuit also includes a capacitive element coupled to the charge pump and chargeable to a second output voltage, and a feedback network including a first feedback loop configured to feed back the first output voltage to an input of the input stage, and a second feedback loop configured to maintain a fixed offset between the first output voltage and the second output voltage.
    Type: Application
    Filed: October 30, 2017
    Publication date: July 26, 2018
    Inventor: Calogero Marco Ippolito
  • Patent number: 10019026
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference, the circuit module including a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: July 10, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Patent number: 9540229
    Abstract: A packaged sensor assembly includes: a packaging structure, having at least one opening; a humidity sensor and a pressure sensor, which are housed inside the packaging structure and communicate fluidically with the outside through the opening, and a control circuit, operatively coupled to the humidity sensor and to the pressure sensor; wherein the humidity sensor and the control circuit are integrated in a first chip, and the pressure sensor is integrated in a second chip distinct from the first chip and bonded to the first chip.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: January 10, 2017
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe Bruno, Sebastiano Conti, Mario Chiricosta, Michele Vaiana, Calogero Marco Ippolito, Mario Maiore, Daniele Casella
  • Publication number: 20160347606
    Abstract: A packaged sensor assembly includes: a packaging structure, having at least one opening; a humidity sensor and a pressure sensor, which are housed inside the packaging structure and communicate fluidically with the outside through the opening, and a control circuit, operatively coupled to the humidity sensor and to the pressure sensor; wherein the humidity sensor and the control circuit are integrated in a first chip, and the pressure sensor is integrated in a second chip distinct from the first chip and bonded to the first chip.
    Type: Application
    Filed: December 8, 2015
    Publication date: December 1, 2016
    Inventors: Giuseppe BRUNO, Sebastiano CONTI, Mario CHIRICOSTA, Michele VAIANA, Calogero Marco IPPOLITO, Mario MAIORE, Daniele CASELLA
  • Publication number: 20160327972
    Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference comprising a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
    Type: Application
    Filed: January 15, 2016
    Publication date: November 10, 2016
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Patent number: 9231597
    Abstract: A calibration circuit for a DCO includes a signal-conditioning module configured for (i) receiving at input an oscillating signal generated by the DCO and a reference signal, both designed to oscillate between a high logic value (“1”) and a low logic value (“0”), and (ii) detecting a respective first and second stable logic value of the reference signal and of the oscillating signal; and a period-to-voltage converter module coupled to the signal-conditioning module and configured for (iii) generating a difference signal identifying a difference between the period of the reference signal and the period of the oscillating signal, and (iv) controlling, on the basis of the difference signal, the DCO so as to conform the duration of the period of the oscillating signal to the duration of the period of the reference signal. Likewise described is a calibration method implemented by the calibration circuit.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: January 5, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Patent number: 9071260
    Abstract: An embodiment of a circuit includes an input node, a generator, a combiner, a converter, and a filter. The input node is configured to receive an input signal in a first domain, and the generator is configured to generate a periodic signal in the first domain. The combiner is configured to combine the input and periodic signals into a resulting signal in the first domain, and the converter is configured to convert the resulting signal into a converted signal in a second domain. And the filter is configured to remove from the converted signal substantially all of a frequency component of the converted signal having substantially a same frequency as a frequency component of the periodic signal.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: June 30, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Chiricosta, Calogero Marco Ippolito, Mario Maiore, Orlando Peluso, Michele Vaiana
  • Publication number: 20150035691
    Abstract: An embodiment of a circuit includes an input node, a generator, a combiner, a converter, and a filter. The input node is configured to receive an input signal in a first domain, and the generator is configured to generate a periodic signal in the first domain. The combiner is configured to combine the input and periodic signals into a resulting signal in the first domain, and the converter is configured to convert the resulting signal into a converted signal in a second domain. And the filter is configured to remove from the converted signal substantially all of a frequency component of the converted signal having substantially a same frequency as a frequency component of the periodic signal.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Inventors: Mario CHIRICOSTA, Calogero Marco IPPOLITO, Mario MAIORE, Orlando PELUSO, Michele VAIANA
  • Publication number: 20140320218
    Abstract: A calibration circuit for a DCO includes a signal-conditioning module configured for (i) receiving at input an oscillating signal generated by the DCO and a reference signal, both designed to oscillate between a high logic value (“1”) and a low logic value (“0”), and (ii) detecting a respective first and second stable logic value of the reference signal and of the oscillating signal; and a period-to-voltage converter module coupled to the signal-conditioning module and configured for (iii) generating a difference signal identifying a difference between the period of the reference signal and the period of the oscillating signal, and (iv) controlling, on the basis of the difference signal, the DCO so as to conform the duration of the period of the oscillating signal to the duration of the period of the reference signal. Likewise described is a calibration method implemented by the calibration circuit.
    Type: Application
    Filed: April 24, 2014
    Publication date: October 30, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Calogero Marco Ippolito, Mario Chiricosta
  • Publication number: 20110148536
    Abstract: A circuit for a voltage controlled oscillator has a bridge structure including two cross-coupled N-type transistors and two cross-coupled P-type transistors. A current mirror is coupled to the two N-type cross-coupled transistors and configured to generate a bias current. An LC resonator is coupled in parallel between the two cross-coupled N-type transistors and the two P-type cross-coupled transistors. The LC resonator includes two pairs of differential inductors mutually coupled by a mutual inductance coefficient, each pair comprising a first inductor arranged on a respective branch of an external loop, and a second inductor arranged on a respective branch of an internal loop. A first varactor is coupled to a common node and a first branch of the internal loop. A second varactor is coupled to the common node and the second branch of the internal loop.
    Type: Application
    Filed: December 17, 2010
    Publication date: June 23, 2011
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro ITALIA, Salvatore Dimartina, Calogero Marco Ippolito, Giuseppe Palmisano