Abstract: Automated circuit transistor level circuit schematic generation is disclosed. In some embodiments, parameters are received, and a transistor level circuit schematic is generated automatically by software based at least in part by the parameters. In some embodiments, software may receive parameters for functional circuit components and generate a transistor level circuit schematic for an integrated circuit comprising the functional circuit components having properties set by the parameters. The functional circuit components comprise analog circuits, which may be combined to form a circuit schematic comprising analog circuits. The present techniques are particularly useful for automatically generating analog and/or mixed signal integrated circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Some embodiments of the present disclosure include techniques for generating a capacitor comprising receiving a total capacitance for a capacitor to be generated, determining a number N of unit capacitors having a unit capacitance to be combined to form the total capacitance, generating a transistor level schematic comprising N unit capacitor schematics having the unit capacitance, wherein the N unit capacitor schematics are configured to produce the total capacitance, and generating a layout comprising N capacitor layout elements configured to produce said capacitor.

Abstract: In some embodiments, information specifying a transistor to be generated is received, the information comprising an on resistance. A total width of a gate of the transistor to be generated is determined based at least on the on resistance. A first width, a number of fingers (F), and a number of device cells (P) are determined based on the total width. A transistor level schematic is generated comprising one or more transistors configured with the first width and the number of fingers (F). A layout is generated, wherein the layout comprises P device cells, each device cell comprising a plurality of gates corresponding to said number of fingers (F) each gate having said first width, wherein the device cells are configured in a two-dimensional array.

Abstract: In some embodiments, a computer-implemented method of generating a resistor comprises receiving a first resistor value, converting the resistor value into a plurality of resistor layout segments, and automatically placing the plurality of resistor layout segments based on one or more layout placement instructions to form the first resistor value.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Embodiments of the present disclosure pertain to techniques for generating and/or verification of integrated circuits. In one embodiment, parameter values of functional circuit components to be generated are used to select behavioral models having model parameters corresponding to the functional circuit component being generated. In some embodiments, data obtained from physical circuits comprising functional circuit components is used in predefined behavioral models of the functional circuit components.

Abstract: The present disclosure relates to the field of drug discovery and therapeutics, including systems and methods to predict drug function, to classify or prioritize drugs based on predicted function, and to test known and novel compounds for function in a vertebrate system. The present disclosure also relates to compounds identified using the disclosed systems and methods, the novel mechanisms of action of the compounds, and applications of the compounds as therapeutics, e.g., as cancer therapeutics.

Abstract: Embodiments of the present disclosure pertain to techniques for generating and/or verification of integrated circuits. In one embodiment, parameters of a circuit to be generated are used to automatically generate customized test programs. In another embodiment, an integrated circuit comprises circuits to facilitate testing and controlling test coverage. In yet another embodiment, data obtained from physical circuits is used to generated or modify customized predefined behavioral models of functional circuit components having particular parameters.

Abstract: The present application provides, inter alia, a compound of Formula (I): or a pharmaceutically acceptable salt thereof, and methods of use of the compound of Formula (I) for treatment and prevention of cyanide poisoning.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.

Abstract: Automated circuit generation is disclosed. In some embodiments, parameters are received and a circuit schematic is generated automatically by software. In some embodiment, parameters are received and a circuit layout is generated automatically by software. In some embodiments, a design interface may be used to create a behavioral model of a circuit. Software may generate a circuit specification to generate a schematic. In various embodiments, circuit component values may be determined and generated. Certain embodiments pertain to automating layout of circuits. Software may receive parameters for functional circuit components and generate a circuit schematic and/or a layout. The present techniques are particularly useful for automatically generating analog circuits.