Abstract: Privacy incidence evaluation systems and methods are disclosed herein. A code changeset is retrieved that identifies a change from a prior version of a code. A tokenization score is determined from keywords present in the code changeset, where the tokenization score is indicative of a presence of a privacy term in the code changeset. A historical score is determined based on a set of computer code stored in a code repository. A privacy risk score is generated from the tokenization score and the historical score, where the privacy risk score indicates a likelihood that the code changeset, if implemented, would result in an occurrence of a privacy incident (e.g., an unintended leak of private data). An action is performed based on the privacy risk score to mitigate a risk of a privacy incident occurrence.

Abstract: A semiconductor device having metal gates and methods of forming the same are disclosed. The semiconductor device includes a substrate and a gate structure over the substrate. The gate structure includes a gate dielectric layer over the substrate, a barrier layer over the gate dielectric layer, an oxide layer over the barrier layer, and a work function metal layer over the oxide layer.

Abstract: A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.

Abstract: A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.