Abstract: The present description describes back-end processes, the use of which may help overcome these problems and limitations of the prior art. In one optional embodiment, the back-end process includes depositing a layer over a wafer. The wafer contains a plurality of circuit die for respective RFID tags. The wafer also has exposed metallic regions. The exposed metallic regions include first regions having electrical contacts to the plurality of circuit die and second regions having electrical contacts to the wafer's electrical test sites. The method includes forming exposed first regions and unexposed second regions by etching the layer over the first regions but not over the second regions. The method also includes plating metallic bumps on the exposed first regions.