Abstract: Interface circuitry of an apparatus receives a first service data packet that includes at least first information for a first multimedia presentation frame and second information for a second multimedia presentation frame. Processing circuitry of the apparatus stores the first information and the second information in different rows having different row number in a service data table. Then the processing circuitry determines, from a preset database, first material data for the first multimedia presentation frame and second material data for the multimedia presentation frame based on material configuration information in the first service data packet. Further the processing circuitry associates the first material data and the second material data in a material data table with different row numbers in the service data table and generates first multimedia service data corresponding to the first service data packet based on the association between the service data table and the material data table.

Abstract: The present disclosure relates to a gate driving circuit applied to a foldable display panel comprising B display areas arranged in order. The gate driving circuit may include B gate driving subcircuits and a control circuit. Each of the gate driving subcircuits may correspond to one of the display areas and each of the gate driving subcircuits may comprise a plurality of stage gate driving units. The control circuit may be configured to, when the foldable display panel is in a full screen display state, control a type of an input signal in a last stage gate driving unit of a bth gate driving subcircuit to be the same as a type of an input signal in a first stage gate driving unit of a (b+1)th gate driving subcircuit, where B is an integer greater than 1 and b is a positive integer less than B.

Abstract: Shift register includes input sub-circuit coupling input terminal to first node responsive to signal of first clock terminal in input stage, control sub-circuit transmitting signal of second clock terminal to intermediate output terminal according to level at first node and controlling potential of third node according to potential of intermediate output terminal and signal of third clock terminal in input, output and reset stages, pull-up sub-circuit coupling second level terminal to final output terminal responsive to potential of intermediate output terminal in output stage, first voltage stabilization sub-circuit stabilizing voltage between final output terminal and third node responsive to signal of next-stage node connection terminal, pull-down transistor having gate electrode coupled to third node, first electrode coupled to first level terminal, and second electrode coupled to final output terminal.

Abstract: A shift register unit, a driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit, a first control circuit, and a second control circuit. The first input circuit is electrically connected to a first node, and is configured to transmit an input signal to the first node; the second input circuit is electrically connected to the first node and a second node, and is configured to control a level of the second node; the first control circuit is electrically connected to the second node and a third node, and is configured to control a level of the third node; and the output circuit is electrically connected to the third node and an output terminal, and is configured to output an output signal to the output terminal.

Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: a starting circuit configured to control, under control of a first clock signal input terminal, turning on or off coupling between a first node and a starting voltage input terminal; a first capacitor circuit, having a first terminal being coupled to a second clock signal input terminal, and a second terminal being coupled to the first node; a first node control circuit configured to control, under control of a third node, turning on or off coupling between the first node and a first level input terminal; a potential control circuit configured to control, under control of the first node, turning on or off coupling between the second node and a second level input terminal; a second capacitor circuit; a second node control circuit; an output circuit; and a third node control circuit.

Abstract: A gate driving circuit and a display substrate are provided. The gate driving circuit may provide a driving signal to gate lines, and include output units cascaded to each other and having a same circuit structure. Each output unit includes at least one output transistor-outputs the driving signal to a corresponding gate line through the output transistor, and all the at least one output transistor is coupled to one gate line. The output units are classified first and second output units. A number of sub-pixels coupled to the gate line corresponding to each first output unit is greater than a number of sub-pixels coupled to the gate line corresponding to each second output unit, and an output capability of at least one output transistor of the first output unit is greater than an output capability of a corresponding output transistor of the second output unit.

Abstract: The present disclosure provides a driving chip, a display substrate, a display device and a method for manufacturing a display device. The driving chip according to the present disclosure includes a substrate; and a plurality of connecting bumps and a plurality of supporting bumps disposed on the substrate. The plurality of connecting bumps include at least one set of connecting bumps arranged along a first direction, and the plurality of supporting bumps include the supporting bump that is located between the adjacent connecting bumps arranged along the first direction.

Abstract: Shift register includes input sub-circuit coupling input terminal to first node responsive to signal of first clock terminal in input stage, control sub-circuit transmitting signal of second clock terminal to intermediate output terminal according to level at first node and controlling potential of third node according to potential of intermediate output terminal and signal of third clock terminal in input, output and reset stages, pull-up sub-circuit coupling second level terminal to final output terminal responsive to potential of intermediate output terminal in output stage, first voltage stabilization sub-circuit stabilizing voltage between final output terminal and third node responsive to signal of next-stage node connection terminal, pull-down transistor having gate electrode coupled to third node, first electrode coupled to first level terminal, and second electrode coupled to final output terminal.

Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes a first gate driving output circuit and a second gate driving output circuit. The first gate driving output circuit is used to output a first gate driving signal through the first gate driving signal output terminal; the second gate driving output circuit is used to generate a second gate driving signal outputted simultaneously with the first gate driving signal based on the first gate driving signal, a first clock signal and a second clock signal. In the present disclosure, the second gate driving output circuit is added, the first gate driving signal, the first clock signal, and the second clock signal are used to generate an inverted second gate driving signal, so that positive and negative switching control signals are generated by one stage of shift register unit.

Abstract: Provided is a shift register, comprising an input circuit, an output circuit, and a control circuit, which are electrically connected to a control node. The input circuit is electrically connected with a signal input terminal of the shift register, and is configured to input an input signal provided by the signal input terminal to the control node. The control circuit is electrically connected with a working power supply terminal, and is configured to input an operation voltage provided by the working power supply terminal to the control node. The output circuit is electrically connected with a signal output terminal of the shift register and a clock signal line, and is configured to input one of a voltage of the control node and the first clock signal provided by the clock signal line to the signal output terminal.

Abstract: A pixel driving circuit and a driving method, and a display device are provided. The driving circuit includes: a first switching element, a second switching element, a third switching element, a fourth switching element, a fifth switching element, a driving transistor, a sixth switching element, a first storage capacitor and a second storage capacitor.

Abstract: Provided are a shift register and a driving method thereof, a gate driving circuit, and a display device. The shift register includes: an input circuit, configured to be coupled to an input signal end and a second clock signal end, respectively; a first transistor, where the first electrode of the first transistor is coupled to the output end of the input circuit, and the first transistor is a double-gate type transistor; the first gate of the first transistor is configured to be coupled to a first reference signal end, and the second gate of the first transistor is configured to be coupled to a first threshold control signal end; and an output circuit, configured to be coupled to a first clock signal end and a signal output end, respectively, where the control end of the output circuit is coupled to the second electrode of the first transistor.

Abstract: The present disclosure relates to a shift register, a gate driving circuit and a display device. The shift register includes an input circuit, a pull-up circuit, a pull-down circuit, and a pulse width control circuit. The input circuit is electrically coupled to a first control terminal, and is configured to receive a trigger signal, and control the pull-down circuit to output a second level signal to an output terminal based on the trigger signal under control of a first control signal at the first control terminal.

Abstract: Embodiments of the present disclosure disclose a method and an apparatus. The apparatus includes interface circuitry and processing circuitry. The processing circuitry obtains attribute information of multimedia information associated with a multimedia provider. The attribute information includes website information of a website used to display the multimedia information and identifier (ID) information associated with the multimedia information. The processing circuitry generates a machine-readable identification code to be scanned by a user device of a user based on at least the website information. Based on the ID information, the processing circuitry obtains a first image corresponding to the multimedia information. The processing circuitry determines an image area in the first image in which the machine-readable identification code is to be inserted. The processing circuitry inserts the machine-readable identification code into the image area to generate a second image.

Abstract: A server provides an exchange platform linking requesters for creatives and creative manufacturing systems. A specification for required creatives is distributed to multiple creative manufacturing systems, and triggers parallel manufacturing of the required creatives on at least a first and a second creative manufacturing system, each proceeds with a respective portion of the required quantity of the required creatives. Before each manufacturing system completes their respective portions of the manufacturing, the server independently requests and receives, in multiple discrete batches, respective quantities of the required creatives that have been completed by the first and second creative manufacturing systems. The server performs independent and parallel verification on the respective quantities of the required creatives that have been completed by the first and second creative manufacturing systems.

Abstract: Shift register includes input sub-circuit coupling input terminal to first node responsive to signal of first clock terminal in input stage, control sub-circuit transmitting signal of second clock terminal to intermediate output terminal according to level at first node and controlling potential of third node according to potential of intermediate output terminal and signal of third clock terminal in input, output and reset stages, pull-up sub-circuit coupling second level terminal to final output terminal responsive to potential of intermediate output terminal in output stage, first voltage stabilization sub-circuit stabilizing voltage between final output terminal and third node responsive to signal of next-stage node connection terminal, pull-down transistor having gate electrode coupled to third node, first electrode coupled to first level terminal, and second electrode coupled to final output terminal.

Abstract: A pixel circuit, a display panel, a display device and a driving method are provided. The pixel circuit includes: a driving transistor, a first transistor, a first capacitor, the organic light-emitting diode and a switching induced error compensation circuit. The switching induced error compensation circuit is connected with a first node and/or a second node and is configured to compensate a switching induced error of the first transistor.

Abstract: A shift register and driving method thereof, a gate driving circuit and a display device are provided. The shift register includes a first input unit, a second input unit, a pull-up control unit, a pull-down control unit, an output control unit and an output reset unit, wherein the first input unit, the second input unit, the pull-up control unit, the pull-down control unit and the output control unit are coupled to a first node, and the pull-up control unit, the pull-down control unit and the output reset unit are coupled to a second node.

Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: a starting circuit configured to control, under control of a first clock signal input terminal, turning on or off coupling between a first node and a starting voltage input terminal; a first capacitor circuit, having a first terminal being coupled to a second clock signal input terminal, and a second terminal being coupled to the first node; a first node control circuit configured to control, under control of a third node, turning on or off coupling between the first node and a first level input terminal; a potential control circuit configured to control, under control of the first node, turning on or off coupling between the second node and a second level input terminal; a second capacitor circuit; a second node control circuit; an output circuit; and a third node control circuit.

Abstract: The present disclosure relates to a shift register, a gate driving circuit and a display device. The shift register includes an input circuit, a pull-up circuit, a pull-down circuit, and a pulse width control circuit. The input circuit is electrically coupled to a first control terminal, and is configured to receive a trigger signal, and control the pull-down circuit to output a second level signal to an output terminal based on the trigger signal under control of a first control signal at the first control terminal.