Abstract: The present disclosure discloses an Internet-of-Things-oriented machine learning container image download system and a method. The Internet-of-Things-oriented machine learning container image download system includes a master node and a plurality of computing nodes; the master node is configured to store and convert a machine learning model, and build a machine learning container image from the format-converted machine learning model; and issue an image download instruction to each of the computing nodes after image information of the machine learning container image is completely built; and each of the computing nodes is configured to receive the image download instruction, download the machine learning container image, and start a machine learning container; and receive data collected by Internet-of-Things devices, and return a data processing result to the Internet-of-Things devices.

Abstract: Embodiments of the disclosure provide a circuit, chip, system, and method for eliminating random perturbation. The circuit includes a weight calculating module for receiving digital signals and random perturbation digital quantity, using least mean square error algorithm to calculate weight deviation iteration coefficient based on digital signal and digital quantity, and updating perturbation weight in real-time according to weight deviation iteration coefficient; and a perturbation eliminating module for eliminating perturbation signal in output digital signal of quantizer according to perturbation weight updated in real-time and updating perturbation weight in real-time according to weight deviation iteration coefficient, and then calculating current perturbation weight in real time to realize self-calibration of perturbation weight.

Abstract: Embodiments of the disclosure provide a circuit for online adaptive direct current offset correction, which includes: an analog adder circuit, a digital-to-analog conversion circuit, a direct current detection circuit, an adaptive update signal generating circuit, an output circuit, and a mode selection circuit. Embodiments of the present disclosure also provide a zero-IF receiver including a circuit for online adaptive DC offset correction.

Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.

Abstract: This application provides a task migration system and method. The system includes a first terminal and a second terminal. The second terminal runs a first application. The first terminal opens a recent task interface after receiving a user operation, where the recent task interface includes an identifier of the second terminal; after receiving a user operation performed on the identifier of the second terminal, displays, in the recent task interface, at least one task card corresponding to an application run by the second terminal in the background; and after receiving a user operation performed on a first task card corresponding to the first application, runs the first application, and displays a first user interface of the first application.

Abstract: The present disclosure provides a polysilicon resistor, a method for manufacturing the same, and a successive approximation register analog-to-digital converter.

Abstract: A differential-follower control circuit has been provided, comprising: a follower; an output-voltage following module, which controls a voltage at a control terminal of the follower to vary with an output voltage; a substrate-voltage following module, which controls a substrate voltage of an output transistor of the follower to vary with an input voltage; an output terminal of the follower is connected to a first terminal of the output-voltage following module; a second terminal of the output-voltage following module is connected to the control terminal of the follower; a first terminal of the substrate-voltage following module is connected to an input terminal of the follower and a second terminal of the substrate-voltage following module is connected to a substrate of the output transistor; the invention effectively improves the overall linearity of the follower.

Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.

Abstract: A comparator offset voltage self-correction circuit is disclosed. A comparator offset voltage which is caused by the semiconductor process parameter randomness also has randomness. Due to the randomness of the comparator offset voltage, a reference voltage of a parallel comparator in a parallel-conversion-type analog-to-digital converter is uncertain. If the comparator offset voltage is large, the parallel-conversion-type analog-to-digital converter may even have a functional error. The comparator offset voltage self-correction circuit provided in the present invention can correct a random offset voltage of a comparator to meet requirements.

Abstract: A comparator offset voltage self-correction circuit is disclosed. A comparator offset voltage which is caused by the semiconductor process parameter randomness also has randomness. Due to the randomness of the comparator offset voltage, a reference voltage of a parallel comparator in a parallel-conversion-type analog-to-digital converter is uncertain. If the comparator offset voltage is large, the parallel-conversion-type analog-to-digital converter may even have a functional error. The comparator offset voltage self-correction circuit provided in the present invention can correct a random offset voltage of a comparator to meet requirements.

Abstract: The invention provides a clock delay adjusting circuit based on edge addition and an integrated chip thereof.

Abstract: A track and hold circuit comprises an input buffer amplifier, a unit gain amplifier module, a sampling switch, a drive triode and a sampling capacitor. The input buffer amplifier receives an input signal. In a track phase, the sampling switch is electrically connected to an emitter electrode of the drive triode; the input signal charges the sampling capacitor after being buffered by the input buffer amplifier, amplified without distortion by the unit gain amplifier module and driven by the drive triode. In a hold phase, the sampling switch is electrically connected to a base electrode of the drive triode; the base voltage of the drive triode is pulled down until the drive triode is cut off; electrical charges on the sampling capacitor are thereby held, causing the signal to be held on the sampling capacitor.

Abstract: The invention provides a clock delay adjusting circuit based on edge addition and an integrated chip thereof.

Abstract: A track and hold circuit comprises an input buffer amplifier, a unit gain amplifier module, a sampling switch, a drive triode and a sampling capacitor. The input buffer amplifier receives an input signal. In a track phase, the sampling switch is electrically connected to an emitter electrode of the drive triode; the input signal charges the sampling capacitor after being buffered by the input buffer amplifier, amplified without distortion by the unit gain amplifier module and driven by the drive triode. In a hold phase, the sampling switch is electrically connected to a base electrode of the drive triode; the base voltage of the drive triode is pulled down until the drive triode is cut off; electrical charges on the sampling capacitor are thereby held, causing the signal to be held on the sampling capacitor.

Abstract: A band-gap reference circuit includes a proportioned current generating circuit, a startup circuit, a current mirror circuit, a high-order temperature compensation generating circuit and a reference generating circuit. The proportioned current generating circuit is configured to generate a current in direct proportion to the absolute temperature. The startup circuit is configured to start up the proportioned current generating circuit when the startup circuit is power on. The current mirror circuit is configured to reproduce a current which is the same as the current in direct proportion to the absolute temperature. The high-order temperature compensation generating circuit is configured to generate a compensation current of high-order temperature coefficient.

Abstract: A band-gap reference circuit includes a proportioned current generating circuit, a startup circuit, a current mirror circuit, a high-order temperature compensation generating circuit and a reference generating circuit. The proportioned current generating circuit is configured to generate a current in direct proportion to the absolute temperature. The startup circuit is configured to start up the proportioned current generating circuit when the startup circuit is power on. The current mirror circuit is configured to reproduce a current which is the same as the current in direct proportion to the absolute temperature. The high-order temperature compensation generating circuit is configured to generate a compensation current of high-order temperature coefficient.

Abstract: Provided is a crystal producing apparatus capable of producing a single crystal having excellent quality. The crystal producing apparatus for growing a single crystal on a crystal growth surface of a seed crystal in a raw material solution by a liquid phase growth method, includes: a liquid tub which accommodates a raw material solution; a crystal holding element which holds a seed crystal; and a solution flowing element which allows the raw material solution in the liquid tub to flow. Among these, the crystal holding element is able to hold the seed crystal in the liquid tub and is movable in at least a partial region on an xy plane perpendicular to a z-axis that extends in a depth direction of the liquid tub.

Abstract: A BiCMOS current reference circuit includes a reference core, a startup circuit, and a reference current output circuit. The reference core contains a current mirror, a positive temperature coefficient current generator, and a negative temperature coefficient current generator. The current mirror generates matching branch current. The positive and negative temperature coefficient currents were added in certain proportion to generate a reference current with zero temperature coefficient at room temperature. The startup circuit starts the reference core at power-on. The reference current output circuit proportionably outputs reference current generated by the reference core. Compared with the conventional voltage reference, the circuit uses current conveying technique, so it won't be affected by DC voltage drops of power supply network, and it features low transmission loss, good matching, excellent temperature stability, small chip size and auto-startup at power-on.