Abstract: The present invention provides an electric power material distribution and allocation method based on an optimized branch and bound method, including: sorting the distribution of each batch of electric power materials to obtain a material set R; screening available vehicle data to obtain a vehicle deadweight set W and a vehicle unique identification set C; determining whether available vehicles meet requirements; and using an optimized queued branch and bound method to obtain an optimal distribution and allocation scheme. According to the present invention, scientific scheme support is provided for the distribution and allocation of the electric power materials, the scientificity of the distribution of power grid materials is improved, the influence of human factors is reduced, the utilization rate of distribution vehicles is increased, the distribution cost of the materials is reduced, and the economic benefit is improved.

Abstract: A method may include receiving input for a multiwell structure and subsurface target locations, where the multiwell structure includes slots; generating, based at least in part on the input, a position for the multiwell structure, slot-well assignments for the slots, and well trajectories, where each of the well trajectories extends from an assigned one of the slots to one or more of the subsurface target locations; and outputting a set of specifications for the position for the multiwell structure, the well trajectories, and an order for drilling the well trajectories.

Abstract: An input common-mode compensation circuit includes an energy storage module, a switching selection module, and a feedback compensation module. An end of the energy storage module is connected to an input end of the residual amplifier. An input end of the switching selection module is connected to another end of the energy storage module. Input ends of the feedback compensation module are respectively connected to the end of the energy storage module and to a reset voltage of the residual amplifier, and an output end of the feedback compensation module is connected to an output end of the switching selection module. During the reset stage of a residual amplifier, the energy storage module is charged under the action of a reset voltage. During the working stage of the residual amplifier, feedback compensation is performed on the energy storage module through the feedback compensation module.

Abstract: An online uncapping system includes a sample intake rail, a scanning blocking mechanism, a sample container information scanning apparatus, an uncapping blocking mechanism, a sample tube clamping mechanism, a sample tube uncapping device, and a cap receiving mechanism. The scanning blocking mechanism is arranged on one side of the sample intake rail; the sample container information scanning apparatus is configured to read information about the sample tube blocked by the scanning blocking mechanism; the uncapping blocking mechanism is arranged on one side of the sample inlet rail and configured to block and release the sample tube; the sample tube clamping mechanism is configured to clamp the sample tube blocked by the uncapping blocking mechanism; the sample tube uncapping device is configured to uncover the sample tube blocked by the uncapping blocking mechanism; and the cap receiving mechanism is configured to collect the tube cap.

Abstract: An online centrifugal system includes a conveying device, a balancing and weighing mechanism, a manipulator, and a centrifuge. The conveying device, the balancing and weighing mechanism and the centrifuge are sequentially arranged. The conveying device is used to convey a sample holder for holding blood collection tubes, the balancing and weighing mechanism is used to weigh an adapter, and the centrifuge is used to perform centrifugation to blood collection tubes. The manipulator is used to grab the blood collection tubes and the adapter respectively, to convey the blood collection tubes between the adapter and the conveying device, and convey the adapter between the centrifuge and the balancing and weighing mechanism. An inlet and outlet window is provided on the centrifuge for passage of the adapter. The balancing and weighing mechanism is used to balance the adapter, thereby meeting balancing needs of the adapter.

Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.

Abstract: A comparison method includes: providing a successive approximation register analog-to-digital converter, where the successive approximation register analog-to-digital converter includes n?1 weighted capacitors, a charge transfer capacitor, and a comparator; sampling an differential input signal by using the first weighted capacitor and the charge transfer capacitor; importing the differential input signal stored on the charge transfer capacitor, where the differential input signal is transferred and redistributed on the charge transfer capacitor and n?2 other weighted capacitors than the first weighted capacitor, and completing the first time of comparison; and importing the differential input signal stored on the first weighted capacitor and the differential input signal stored on the charge transfer capacitor, importing a reference voltage by using the second to jth weighted capacitors, where the differential input signal and the reference voltage are transferred and redistributed on a capacitor array, and

Abstract: An adaptive current generation circuit includes an inverter drive chain, a frequency divider, a frequency detector, a low-pass filter, a static comparator group, and a controllable current mirror. An input analog signal of the input buffer is converted into a frequency discrimination voltage in a direct current form sequentially through conversion of the inverter drive chain, frequency division of the frequency divider, frequency detection of the frequency detector, and conversion of the low-pass filter. Then the static comparator group performs a plurality of times of comparison to obtain N bits of digital codes. Finally, the controllable current mirror is controlled by using the N bits of digital codes. The controllable current mirror provides a magnitude-adjustable input current for the input buffer under control of the N bits of digital codes. A magnitude of the input current is positively correlated with a frequency of the input analog signal.

Abstract: A comparator based on a pre-amplifier stage structure and an analog-to-digital converter are provided. The comparator includes: a first pre-amplifier stage, where an input terminal of the first pre-amplifier stage is connected to a differential input signal, to amplify and output the differential input signal so as to output a first differential output signal; a second pre-amplifier stage, where an input terminal of the second pre-amplifier stage is connected to the first differential output signal, to amplify and output the first differential output signal so as to output a second differential output signal, and a positive feedback unit is disposed between an output terminal of the second pre-amplifier stage and the input terminal of the second pre-amplifier stage, to increase a voltage gain of the second pre-amplifier stage by using the positive feedback unit; and a latch, an input terminal thereof connected to the second differential output signal.

Abstract: A fourth-order feedforward compensation operational amplifier is provided. The amplifier includes a first transconductance amplification unit, a second transconductance amplification unit, a third transconductance amplification unit, a fourth transconductance amplification unit, a fifth transconductance amplification unit, a sixth transconductance amplification unit, and a seventh transconductance amplification unit. The first unit, the second unit, the third unit, and the fourth unit are cascaded in sequence to form a fourth-order operational amplifier path. The first unit, the fifth unit, and the fourth unit form a third-order operational amplifier path. The first unit and the sixth unit form a second-order operational amplifier path. The seventh unit forms a first-order operational amplifier path.

Abstract: A circuit for channel randomization based on time-interleaved ADC includes: a channel selection module for outputting M clock reception control signals and encoded N data reception control signals based on a main clock and a generated random number; a multi-phase clock distribution module for generating N multi-phase clocks according to a sampling main clock, redistributing the multi-phase clocks according to the clock reception control signals, and outputting M redistributed clock signals; a time-interleaved ADC module for outputting M output data and a corresponding number of channel quantization completion signals according to the redistributed clock signals; an adjustable delay module for setting a delay length for the data reception control signals; and a timing distribution control module for controlling, according to delayed data reception control signals and the channel quantization completion signals, the output data to be output sequentially in chronological order.

Abstract: Reference voltage circuits and methods for designing the same are provided. The reference voltage circuit includes: a reference core unit configured to output a reference voltage; a main amplification unit connected to the reference core unit and configured to form feedback to the reference core unit; and a feedforward amplification unit connected to the main amplification unit and configured to form feedforward to the main amplification unit. The reference core unit, the main amplification unit, and the feedforward amplification unit form a third-order negative feedback loop to improve a power supply rejection ratio of the reference voltage.

Abstract: Embodiments of the disclosure provide a circuit, chip, system, and method for eliminating random perturbation. The circuit includes a weight calculating module for receiving digital signals and random perturbation digital quantity, using least mean square error algorithm to calculate weight deviation iteration coefficient based on digital signal and digital quantity, and updating perturbation weight in real-time according to weight deviation iteration coefficient; and a perturbation eliminating module for eliminating perturbation signal in output digital signal of quantizer according to perturbation weight updated in real-time and updating perturbation weight in real-time according to weight deviation iteration coefficient, and then calculating current perturbation weight in real time to realize self-calibration of perturbation weight.

Abstract: Embodiments of the disclosure provide a circuit for online adaptive direct current offset correction, which includes: an analog adder circuit, a digital-to-analog conversion circuit, a direct current detection circuit, an adaptive update signal generating circuit, an output circuit, and a mode selection circuit. Embodiments of the present disclosure also provide a zero-IF receiver including a circuit for online adaptive DC offset correction.

Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.

Abstract: The present disclosure provides a polysilicon resistor, a method for manufacturing the same, and a successive approximation register analog-to-digital converter.

Abstract: A differential-follower control circuit has been provided, comprising: a follower; an output-voltage following module, which controls a voltage at a control terminal of the follower to vary with an output voltage; a substrate-voltage following module, which controls a substrate voltage of an output transistor of the follower to vary with an input voltage; an output terminal of the follower is connected to a first terminal of the output-voltage following module; a second terminal of the output-voltage following module is connected to the control terminal of the follower; a first terminal of the substrate-voltage following module is connected to an input terminal of the follower and a second terminal of the substrate-voltage following module is connected to a substrate of the output transistor; the invention effectively improves the overall linearity of the follower.

Abstract: A follow-hold switch circuit comprising: a follower; a sampling sub-circuit for voltage sampling; a bootstrap-control sub-circuit, which provides a bootstrap voltage to the sampling sub-circuit when the circuit is in a following state; a sampling-switch-control sub-circuit, which provides a common-mode voltage to a bootstrap capacitor in the bootstrap-control sub-circuit when the circuit is in a holding state; the follower is connected to an output of the sampling sub-circuit; the sampling sub-circuit is connected to the bootstrap-control sub-circuit and the sampling-switch-control sub-circuit respectively through a sampling switch; the present disclosure can effectively improve the linearity of sampling switches.

Abstract: A comparator offset voltage self-correction circuit is disclosed. A comparator offset voltage which is caused by the semiconductor process parameter randomness also has randomness. Due to the randomness of the comparator offset voltage, a reference voltage of a parallel comparator in a parallel-conversion-type analog-to-digital converter is uncertain. If the comparator offset voltage is large, the parallel-conversion-type analog-to-digital converter may even have a functional error. The comparator offset voltage self-correction circuit provided in the present invention can correct a random offset voltage of a comparator to meet requirements.

Abstract: A comparator offset voltage self-correction circuit is disclosed. A comparator offset voltage which is caused by the semiconductor process parameter randomness also has randomness. Due to the randomness of the comparator offset voltage, a reference voltage of a parallel comparator in a parallel-conversion-type analog-to-digital converter is uncertain. If the comparator offset voltage is large, the parallel-conversion-type analog-to-digital converter may even have a functional error. The comparator offset voltage self-correction circuit provided in the present invention can correct a random offset voltage of a comparator to meet requirements.