Abstract: A microelectromechanical system includes a first wafer, a second wafer including a moveable portion, and a third wafer. The movable portion is movable between the first wafer and the third wafer. The first wafer, the second wafer, and the third wafer are bonded together.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.

Abstract: Disclosed are layered groupings and methods for constructing digital circuitry, such as memory known as Permanent Inexpensive Rugged Memory (PIRM) cross point arrays which can be produced on flexible substrates by patterning and curing through the use of a transparent embossing tool.

Abstract: Digital circuitry, such as interconnective pads which are patterned as waffles according to the embossing methods for flexible substrates which are disclosed, so as to be especially suited for the interconnection of stacks of circuitry blocks forming digital memory known as Permanent Inexpensive, Rugged Memory (PIRM) cross point arrays.

Abstract: An electrostatic actuator having a first member and a second member. The first member has a first opposed surface that includes an array of driven electrodes. The driven electrodes have a pitch pr. The second member has a second opposed surface and includes an array of drive electrodes. A support positions the first member adjacent the second member with the first opposed surface spaced apart from the second opposed surface by a spacing d. The ratio of the spacing and the pitch should be less than eight, and is preferably less than 2.25. The support permits the first member to move relative to the second member, or vice versa. A voltage source establishes a substantially alternating voltage pattern on the array of driven electrodes.

Abstract: A data storage device is disclosed that comprises a cross-point memory array formed on a dielectric substrate material. The cross-point memory array comprises first and second sets of transverse electrodes separated by a storage layer including at least one semiconductor layer. The storage layer forms a non-volatile memory element at each crossing point of electrodes from the first and second sets. Each memory element can be switched between low and high impedance states, representing respective binary data states, by application of a write signal in the form of a predetermined current density through the memory element. Each memory element includes a diode junction formed in the storage layer, at least whilst in the low impedance state. A plurality of the data storage devices can be stacked and laminated into a memory module providing inexpensive high capacity data storage.

Abstract: A memory circuit includes a cross-point memory array having first and second sets of transverse electrodes with respective memory elements formed at the crossing-points of the first and second set electrodes. Each of the memory elements is formed to include, in at least one of its binary states, a diode element. The memory circuit also includes an addressing circuit coupled to the memory array. The addressing circuit has a first set of address lines with first diode connections between the first set address lines and the first set memory array electrodes, with the first diode connections coupling each memory array electrode in the first set to a respective unique subset of the first set address lines.

Abstract: A memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossing-points function as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the array. In order to construct the addressing circuitry, the electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area. By applying a programming electrical signal to the electrodes, the electrical characteristics (e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry.

Abstract: A data storage device is disclosed that comprises a cross-point memory array formed on a dielectric substrate material. The cross-point memory array comprises first and second sets of transverse electrodes separated by a storage layer including at least one semiconductor layer. The storage layer forms a non-volatile memory element at each crossing point of electrodes from the first and second sets. Each memory element can be switched between low and high impedance states, representing respective binary data states, by application of a write signal in the form of a predetermined current density through the memory element. Each memory element includes a diode junction formed in the storage layer, at least whilst in the low impedance state. A plurality of the data storage devices can be stacked and laminated into a memory module providing inexpensive high capacity data storage.

Abstract: A memory array and some addressing circuitry therefor are formed by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. The circuit elements formed at the crossing-points function as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the array. In order to construct the addressing circuitry, the electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area. By applying a programming electrical signal to the electrodes, the electrical characteristics (e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry.

Abstract: A data storage system that is adapted for storing image data in digital cameras comprises a temporary data storage circuit coupled, in use, to receive image data from the camera, and a permanent data storage circuit coupled, in use, to receive image data from the temporary data storage circuit. A control circuit is coupled to the temporary data storage circuit and the permanent data storage circuit to effect transfer of image data from the temporary data storage circuit to the permanent data storage circuit upon occurrence of a predetermined event. The permanent data storage circuit may be in the form of a write-once non-volatile memory module, which is replaceable in the storage system. The temporary data storage circuit can be a RAM or Flash memory that temporarily stores a image data from the camera when a picture is taken. Then, the user may review the picture before it is permanently stored upon the occurrence of the predetermined event.

Abstract: A method and device for reducing the number of interconnections between a memory module and interface circuit comprises a memory module having a plurality of memory layers and an addressing circuitry, wherein the memory layer is formed as layers of arrays of memory elements. Furthermore, each of the plurality of memory layers includes memory array circuits and modulation circuits. The memory array circuits are cross-point memory array circuits. The modulation circuits receive signals transmitted from the array and spread the signals across a frequency spectrum. The modulation circuit is a band-pass filter coupled to a rectifier circuit. Each of the plurality of memory layers is coupled to a multiplexing/demultiplexing circuit, which further reduces the number of, required connections between the memory module and an interface and control circuit.

Abstract: A data decoder for decoding digital data in a high frequency signal in an optical storage device. A carrier signal derived from the high frequency passed through a zonal bandpass filter and a limiter is multiplied by the high frequency signal passed through a high pass filter. The resulting product is filtered and passed through a comparator forming a digital data stream.

Abstract: A memory circuit includes a cross-point memory array having first and second sets of transverse electrodes with respective memory elements formed at the crossing-points of the first and second set electrodes. Each of the memory elements is formed to include, in at least one of its binary states, a diode element. The memory circuit also includes an addressing circuit coupled to the memory array. The addressing circuit has a first set of address lines with first diode connections between the first set address lines and the first set memory array electrodes, with the first diode connections coupling each memory array electrode in the first set to a respective unique subset of the first set address lines.

Abstract: An electrostatic actuator having a first member and a second member. The first member has a first opposed surface that includes an array of driven electrodes. The driven electrodes have a pitch p.sub.r. The second member has a second opposed surface and includes an array of drive electrodes. A support positions the first member adjacent the second member with the first opposed surface spaced apart from the second opposed surface by a spacing d. The ratio of the spacing and the pitch should be less than eight, and is preferably less than 2.25. The support permits the first member to move relative to the second member, or vice versa. A voltage source establishes a substantially alternating voltage pattern on the array of driven electrodes.