Abstract: A single instruction multiple data (SIMD) processor particularly suited for scientific applications includes a high level language programmable front end processor, a parallel task processor having an array memory, a large very high speed secondary storage system having high speed I/O channels to the front end processor and the array memory, and a control unit directing the parallel task processor via a template control mechanism. In operation an entire task is transferred from the front end processor to the secondary storage system whereupon the task is executed on the parallel task processor under the control of the control unit thereby freeing the front end processor to perform general purpose I/O, and other tasks. Upon parallel task completion, the complete results thereof are transferred back to the front end processor from the secondary storage system. The array memory is associated with an alignment network for non-conflictingly storing and accessing linear vectors.