Abstract: A method for making a coated cutting tool insert by depositing by CVD, onto a cemented carbide, titanium based or ceramic substrate a hard layer system, having a total thickness of from about 2 to about 50 ?m, comprising at least one layer selected from titanium carbide, titanium nitride, titanium carbonitride, titanium carboxide and aluminum oxide, and an outer, from about 1 to about 15 ?m thick, aluminum oxide layer or (Al2O3+ZrO2)*N multilayer, a penultimate outermost layer of TiOx, where x ranges from about 1 to about 2, and an outermost, from about 0.3 to about 2 ?m thick, TiCxNyOz layer, where x+y+z=1, x?0, y?0, and z?0, followed by a post-treatment removing at least said outermost layer on the edge-line and on the rake face.

Abstract: A method for making a coated cutting tool insert by depositing by CVD, onto a cemented carbide, titanium based or ceramic substrate a hard layer system, having a total thickness of from about 2 to about 50 ?m, comprising at least one layer selected from titanium carbide, titanium nitride, titanium carbonitride, titanium carboxide and aluminum oxide, and an outer, from about 1 to about 15 ?m thick, aluminum oxide layer or (Al2O3+ZrO2)*N multilayer, a penultimate outermost layer of TiOx, where x ranges from about 1 to about 2, and an outermost, from about 0.3 to about 2 ?m thick, TiCxNyOz layer, where x+y+z=1, x?0, y?0, and z?0, followed by a post-treatment removing at least said outermost layer on the edge-line and on the rake face.

Abstract: The present invention relates to a metal cutting tool insert with a coating comprising a metal oxide multilayer, which exhibits especially high resistance to plastic deformation as well as excellent resistance to flank and crater wear and high resistance to flaking, particular when used for machining of low carbon steel and stainless steel. The invention also relates to a method of making such a cutting tool insert.

Abstract: A method for forming an electrical device structure in an integrated circuit comprises providing a substrate; forming a passivation layer thereon; forming a plurality of through holes in the passivation layer, the through holes; removing substrate material under the passivation layer by means of isotropic etching, thus forming at least a first cavity in the substrate beneath the plurality of through holes; forming a dielectric layer on top of the passivation layer to plug the through holes, thereby creating a membrane; and creating an electrical device, such as e.g. an inductor, above the membrane.

Abstract: In an integrated circuit, particularly an integrated circuit for radio frequency applications, a semiconductor structure for isolation of semiconductor devices that includes a semiconductor substrate, at least one shallow trench extending vertically into the substrate, a deep trench laterally located within the shallow trench, where the deep trench extends vertically further into the substrate. The deep trench is self aligned to the shallow trench with a controlled lateral distance between an edge of the shallow trench and an edge of the deep trench and the lateral extensions of the shallow and deep trenches, respectively, are independently chosen.

Abstract: In the fabrication of an integrated circuit, particularly an integrated circuit for radio frequency applications, a method for forming shallow and deep .

Abstract: In the fabrication of an integrated circuit, particularly an integrated circuit for radio frequency applications, a method for forming shallow and deep trenches for isolation of semiconductor devices comprised in said circuit, comprising providing a semiconductor substrate; optionally forming a first dielectric layer on said substrate; forming at least one shallow trench by using a first mask, said shallow trench extending into said substrate; forming a second dielectric layer of a predetermined thickness on the structure obtained subsequent to the step of forming at least one shallow trench; forming at least one opening in said second dielectric layer by using a second mask with an edge of said second mask aligned to an edge of said shallow trench with a maximum misalignment of half the predetermined thickness, said opening extending within the shallow trench to the bottom thereof, whereby a spacer of a width equal to the predetermined thickness is formed in said shallow trench and along said edge thereof; a

Abstract: A method for forming an electrical device structure in an integrated circuit comprises providing a substrate; forming a passivation layer thereon; forming a plurality of through holes in the passivation layer, the through holes; removing substrate material under the passivation layer by means of isotropic etching, thus forming at least a first cavity in the substrate beneath the plurality of through holes; forming a dielectric layer on top of the passivation layer to plug the through holes, thereby creating a membrane; and creating an electrical device, such as e.g. an inductor, above the membrane.