Abstract: An integrated circuit device comprising at least one analogue to digital converter. The at least one ADC comprises at least one input operably coupled to at least one external contact of the integrated circuit device. The integrated circuit device further comprises detection circuitry comprising at least one detection module. The at least one detection module being arranged to receive at a first input thereof an indication of a voltage level at the at least one input of the at least one ADC, compare the received indication to a threshold value, and if the received indication exceeds the threshold value, output an indication that an excessive voltage state at the at least one input of the at least one ADC has been detected.

Abstract: A microcontroller unit comprises a reset controller operably coupled to a plurality of logic elements of the microcontroller unit. Low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller. A method of operating a microcontroller unit is also described.

Abstract: Integrated circuit having a Microcontroller Unit and Methods of Operation therefore. An integrated circuit comprises a microcontroller unit with synchronous logic operably coupled to non-clocked intelligent logic. The non-clocked intelligent logic is arranged to autonomously monitor multiple events associated with an operation of the synchronous logic and, in response thereto, the non-clocked intelligent logic initiates autonomously an alternate operational mode of the microcontroller unit. A method of operating a microcontroller unit is also described.

Abstract: A clocking system, comprises a plurality of clocked data processing devices and a clock control circuit controlling a generation of a plurality of clock signals and an application of the clock signals to the plurality of data processing devices, allowing to clock at least one of the data processing devices while freezing all but the at least one of the data processing devices. A method for clocking a plurality of clocked data processing devices comprises controlling a generation of a plurality of clock signals and controlling an application of the clock signals to the plurality of data processing devices, allowing to clock at least one of the data processing devices while freezing all but the at least one of the data processing devices.

Abstract: A micro controller unit including an error indicator hardware module, the error indicator module being arranged to respond to event signals representative of internal and external fault and error events perturbing the micro controller unit function by registering in non-volatile memory a record of the nature of each of the events, wherein the record of the events is inaccessible to alteration.

Abstract: A microcontroller unit comprises a reset controller operably coupled to a plurality of logic elements of the microcontroller unit. Low voltage detection logic is operably coupled to the reset controller and arranged to provide a plurality of low voltage interrupt signals to a number of respective logic elements of the microcontroller unit via the reset controller. A method of operating a microcontroller unit is also described.

Abstract: Integrated circuit having a Microcontroller Unit and Methods of Operation therefore. An integrated circuit comprises a microcontroller unit with synchronous logic operably coupled to non-clocked intelligent logic. The non-clocked intelligent logic is arranged to autonomously monitor multiple events associated with an operation of the synchronous logic and, in response thereto, the non-clocked intelligent logic initiates autonomously an alternate operational mode of the microcontroller unit. A method of operating a microcontroller unit is also described.

Abstract: An interrupt response control apparatus comprises an input for receiving an interrupt request. A response monitoring module is arranged to detect performance of a first function in response to the interrupt request. A timer is used to determine whether a period of time has elapsed, and if the interrupt request has not been serviced by the first function within the elapsed period of time, a function initiation module initiates a second function in response to failure to provide the first function within the elapsed period of time.