Patents by Inventor Carl E. Hoge
Carl E. Hoge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7881072Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.Type: GrantFiled: August 11, 2006Date of Patent: February 1, 2011Assignee: Molex IncorporatedInventors: Joseph Ted Dibene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Publication number: 20100325882Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.Type: ApplicationFiled: June 30, 2010Publication date: December 30, 2010Applicant: Molex IncorporatedInventors: Joseph Ted DiBene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Patent number: 7245507Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.Type: GrantFiled: July 23, 2002Date of Patent: July 17, 2007Inventors: Joseph T. DiBene, II, David H. Hartke, James J. Hjerpe Kaskade, Carl E. Hoge
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Patent number: 6847529Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.Type: GrantFiled: December 20, 2001Date of Patent: January 25, 2005Assignee: INCEP Technologies, Inc.Inventors: Joseph Ted Dibene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Publication number: 20030214800Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance. interconnect.Type: ApplicationFiled: March 25, 2003Publication date: November 20, 2003Inventors: Joseph Ted Dibene, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Patent number: 6618268Abstract: A method, apparatus, and article of manufacture for providing power from a first circuit board having a first circuit board first conductive surface and a first circuit board second conductive surface to a second circuit board having a second circuit board first conductive surface and a second circuit board second conductive surface is described. The apparatus comprises a first conductive member, including a first end having a first conductive member surface electrically coupleable to the first circuit board first conductive surface and a second end distal from the first end having a first conductive member second surface electrically coupleable to the second circuit board first surface.Type: GrantFiled: March 8, 2001Date of Patent: September 9, 2003Assignee: Incep Technologies, Inc.Inventors: Joseph T. Dibene, II, David H. Hartke, Edward J. Derian, Carl E. Hoge, James M. Broder, Jose B. San Andres, Joseph S. Riel
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Patent number: 6556455Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance interconnect.Type: GrantFiled: October 30, 2001Date of Patent: April 29, 2003Assignee: Incep Technologies, Inc.Inventors: Joseph T. Dibene, II, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Publication number: 20030002268Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance. interconnect.Type: ApplicationFiled: December 20, 2001Publication date: January 2, 2003Inventors: Joseph Ted Dibene, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Publication number: 20020196614Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.Type: ApplicationFiled: July 23, 2002Publication date: December 26, 2002Applicant: INCEP Technologies, Inc.Inventors: Joseph T. DiBene, David H. Hartke, James J. Hjerpe Kaskade, Carl E. Hoge
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Patent number: 6452113Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.Type: GrantFiled: February 16, 2001Date of Patent: September 17, 2002Assignee: INCEP Technologies, Inc.Inventors: Joseph Ted Dibene, II, David H. Hartke, James Hjerpe Kaskade, Carl E. Hoge
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Publication number: 20020114129Abstract: A power interconnection system comprising a plurality of z-axis compliant connectors passing power and ground signals between a first circuit board to a second circuit board is disclosed. The interconnection system provides for an extremely low impedance through a broad range of frequencies and allows for large amounts of current to pass from one substrate to the next either statically or dynamically. The interconnection system may be located close to the die or may be further away depending upon the system requirements. The interconnection may also be used to take up mechanical tolerances between the two substrates while providing a low impedance. interconnect.Type: ApplicationFiled: October 30, 2001Publication date: August 22, 2002Inventors: Joseph T. Dibene, David H. Hartke, Carl E. Hoge, Edward J. Derian
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Publication number: 20010036066Abstract: A method, apparatus, and article of manufacture for providing power from a first circuit board having a first circuit board first conductive surface and a first circuit board second conductive surface to a second circuit board having a second circuit board first conductive surface and a second circuit board second conductive surface is described. The apparatus comprises a first conductive member, including a first end having a first conductive member surface electrically coupleable to the first circuit board first conductive surface and a second end distal from the first end having a first conductive member second surface electrically coupleable to the second circuit board first surface.Type: ApplicationFiled: March 8, 2001Publication date: November 1, 2001Inventors: Joseph T. Dibene, David H. Hartke, Edward J. Derian, Carl E. Hoge, James M. Broder, Jose B. San Andres, Joseph S. Riel
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Publication number: 20010032738Abstract: A microprocessor packaging architecture using a modular circuit board assembly that provides power to a microprocessor while also providing for integrated thermal and electromagnetic interference (EMI) is disclosed. The modular circuit board assembly comprises a substrate, having a component mounted thereon, a circuit board, including a circuit for supplying power to the component, and at least one conductive interconnect device disposed between the substrate and the circuit board, the conductive interconnect device configured to electrically couple the circuit to the component.Type: ApplicationFiled: February 16, 2001Publication date: October 25, 2001Inventors: Joseph Ted Dibene, David Hartke, Kaskade James Hjerpe, Carl E. Hoge
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Patent number: 5213715Abstract: A directionally conductive polymer (DCP) provides an electrical interconnect between terminal or conductors on a pair of electrical components. The DCP is applied in viscous film form to the interface between the two components. The DCP comprises a resinous matrix containing metal particles in an amount normally causing the film to act as an electrical insulator. Electrical conduction through the film is normally inhibited in an unstressed state. When a stress is applied to the film, the metal particles make contact to form a continuous electrical path through the film in alignment with the applied stress. The metal particles maintain electrical insulating properties in regions of the film not subjected to the applied stress. In one embodiment, the film includes a metal polymer dispersed in a dielectric carrier resin. A first resinous material dissolved in a solvent contains a dispersion of metal particles. The dielectric material comprises a second resinous material dissolved in the same solvent.Type: GrantFiled: April 17, 1989Date of Patent: May 25, 1993Assignee: Western Digital CorporationInventors: Timothy P. Patterson, Carl E. Hoge
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Patent number: 5147210Abstract: A polymer film interconnect forms an electrical interconnect between a first pattern of electrical conductors on a first electrical component and a second pattern of electrical conductors on a second electrical component. The polymer film interconnect includes a thin, flexible, self-supporting dielectric polymeric film having a pattern of spaced apart thru-holes containing separate quantities of an electrically conductive bonding material capable of heat bonding to the first electrical conductors adjacent the first surface of the film and to the second conductors adjacent the second surface of the film. This provides a plurality of discrete electrically isolated conductive paths from the first pattern of electrical conductors through the film to the second pattern of electrical conductors on the opposite side of the film.Type: GrantFiled: October 1, 1991Date of Patent: September 15, 1992Assignee: Western Digital CorporationInventors: Timothy P. Patterson, Carl E. Hoge
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Patent number: 5069626Abstract: A plated plastic castellated interconnect comprises a substrate made from a molded polymeric material and having top and bottom surfaces with a plurality of separate mutually spaced apart castellations integrally molded to the substrate and projecting from the bottom surface of the substrate. A plurality of separate spaced apart recessed regions may be molded in an edge of the substrate and aligned with the castellations. A plurality of metal conductors are plated to the substrate as separate conductive circuit traces, so that each circuit trace extends continuously from the top surface, along the surface of a corresponding recess and to a common plane on a respective castellation at the bottom of the substrate. The plated metal castellations are arranged for soldering or gluing to contacts on a printed circuit board for electrical connection to an electrical component such as an IC chip connected to the circuit traces on the substrate.Type: GrantFiled: August 20, 1990Date of Patent: December 3, 1991Assignee: Western Digital CorporationInventors: Timothy P. Patterson, Carl E. Hoge, Joseph Baia
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Patent number: 4843188Abstract: An integrated circuit chip mounting and packaging assembly is described. The assembly comprises a spreader having one or more chips centrally mounted thereon. A plurality of leads are disposed outward of the integrated circuit chip on the same side of the spreader as the chip. When fully assembled, the spreader is positioned, chip side down, over a cavity in a printed circuit board-like substrate. The cavity is ringed with connectors which contact the spreader leads and appropriately connect the integrated circuit chip to other electronic components mounted on the substrate.Type: GrantFiled: March 25, 1986Date of Patent: June 27, 1989Assignee: Western Digital CorporationInventors: Timothy P. Patterson, Carl E. Hoge
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Patent number: 4487638Abstract: A method of attaching semiconductor die to a package substrate and a composition for such die attach is disclosed, which method and composition comprise the combination of a low and a high-melting powder with a vehicle consisting of a solvent and a binder so as to form a thick-film ink. The ink is deposited onto the package substrate and the semiconductor die with a metallized back surface is located in contact with the deposited ink. The package containing the ink and the die is heated to a temperature of approximately 160.degree. C. so as to remove the solvent from the powders and the residual binder. Next, the package is fired at a temperature within the range of approximately 200.degree. C. to 430.degree. C. so as to melt the low-melting powder which bonds the chip to the package substrate. Then, a lid is sealed over the die-receiving cavity of the package by heating the package and the bonded die to a temperature within a range of approximately 400.degree. C. to 450.degree. C.Type: GrantFiled: November 24, 1982Date of Patent: December 11, 1984Assignee: Burroughs CorporationInventor: Carl E. Hoge
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Patent number: 4388132Abstract: In the disclosed method, a protective film is attached to an integrated circuit by the steps of placing a droplet of an adhesive on the surface of the integrated circuit; dropping the film on the droplet of adhesive; squeezing the droplet into a layer with the weight of the film; and aligning corresponding edges of the film and integrated circuit via the surface tension in the adhesive.Type: GrantFiled: June 1, 1981Date of Patent: June 14, 1983Assignee: Burroughs CorporationInventors: Carl E. Hoge, Gregory K. Lin