Patents by Inventor Carl Ferdinand Liepold

Carl Ferdinand Liepold has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116307
    Abstract: Disclosed herein are system, methods, and apparatus for low power capacitive sensors. Apparatus may include a timing block configured to generate a repetitive trigger signal having a first frequency, and further configured to generate a clock signal having a second frequency. Apparatus may also include a sensing block coupled with the timing block and configured to, in response to the repetitive trigger signal, detect a change in capacitance associated with an object proximate to a capacitive sensor button by applying an excitation signal to the capacitive sensor button during a measurement period. Apparatus further include a wake logic block coupled with the sensing block and configured to transition a processing unit from a first power consumption state to a second power consumption state in response to the sensing block detecting the change in capacitance associated with the object proximate to the capacitive sensor button.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: October 30, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Carl Ferdinand Liepold, Hans Klein
  • Patent number: 9960773
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: May 1, 2018
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Carl Ferdinand Liepold, Onur Ozbek
  • Patent number: 9634667
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: April 25, 2017
    Assignee: Cypress Semiconductor Corporation
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Bruce E. Byrkett, Carl Ferdinand Liepold, Hans Van Antwerpen
  • Publication number: 20170085268
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Application
    Filed: September 19, 2016
    Publication date: March 23, 2017
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Carl Ferdinand Liepold, Onur Ozbek
  • Publication number: 20160329900
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Application
    Filed: March 26, 2015
    Publication date: November 10, 2016
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Onur Ozbek, Carl Ferdinand Liepold
  • Patent number: 9473144
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: October 18, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Onur Ozbek, Carl Ferdinand Liepold
  • Publication number: 20160118980
    Abstract: Disclosed herein are system, methods, and apparatus for low power capacitive sensors. Apparatus may include a timing block configured to generate a repetitive trigger signal having a first frequency, and further configured to generate a clock signal having a second frequency. Apparatus may also include a sensing block coupled with the timing block and configured to, in response to the repetitive trigger signal, detect a change in capacitance associated with an object proximate to a capacitive sensor button by applying an excitation signal to the capacitive sensor button during a measurement period. Apparatus further include a wake logic block coupled with the sensing block and configured to transition a processing unit from a first power consumption state to a second power consumption state in response to the sensing block detecting the change in capacitance associated with the object proximate to the capacitive sensor button.
    Type: Application
    Filed: September 25, 2015
    Publication date: April 28, 2016
    Applicant: Cypress Semiconductor Corporation
    Inventors: Andriy Maharyta, Carl Ferdinand Liepold, Hans Klein
  • Publication number: 20160065216
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, and at least one reconfigurable analog circuit block selected from: a continuous time (CT) block comprising a plurality of reconfigurable amplifier circuits and a discrete time block comprising amplifiers with a reconfigurable switch network; an analog multiplexer (MUX) configured to selectively connect any of a plurality of input/outputs (I/Os) of the IC device to the analog blocks, the analog MUX including at least one low noise signal path pair having a lower resistance than other signal paths of the analog MUX; at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; a digital section comprising digital circuits; and a processor interface coupled to the analog blocks.
    Type: Application
    Filed: March 26, 2015
    Publication date: March 3, 2016
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, JR., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Bruce E. Byrkett, Carl Ferdinand Liepold, Hans Van Antwerpen
  • Patent number: 9176636
    Abstract: A capacitance sensing module includes a timer circuit configured to generate a repetitive trigger signal, a low power oscillator block configured to generate a clock signal having a higher frequency than the repetitive trigger signal, a sensing block coupled with the timer circuit and the oscillator block and configured to, in response to the repetitive trigger signal, detect a presence of a conductive object at a capacitive sensor button by applying an excitation signal based on the clock signal to the capacitive sensor button, and a wake logic block coupled with the sensing block and configured to transition a processing unit from a low power consumption state to a high power consumption state in response to the sensing block detecting the presence of the conductive object at the capacitive sensor button.
    Type: Grant
    Filed: March 24, 2015
    Date of Patent: November 3, 2015
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Andriy Maharyta, Carl Ferdinand Liepold, Hans Klein