Abstract: A digital data radio receiver and method evaluates a data signal preamble received on an antenna to determine whether the antenna should receive the data signal following the preamble. The receiver determines frequency offsets from a desired frequency for each symbol in a block of symbols in the preamble, determines the variance of the frequency offsets, determines the average magnitude of the symbols in the block of symbols, where the determination of average magnitude may be performed in parallel with the determination of variance of the frequency offsets, and evaluates the variance and the average magnitude for the block of symbols to determine whether the preamble is actually noise and to assess reception quality at the antenna. In a two antenna diversity receiver system, these steps may be performed first on a block of symbols received at one antenna and then performed on the next block of symbols received at another antenna.

Abstract: A method of estimating signal quality in a radio demodulator receiving an input stream of symbols includes the steps of sampling a phase-only portion of each of the symbols in the input stream, determining a phase error for each of the samples of the phase-only portions, and calculating a signal quality estimate from a plurality of the sample phase errors. The signal quality estimate may be an average magnitude of a predetermined number of sample phase errors. The input stream may be symbols in the preamble, or symbols in the data signal that follows.

Abstract: A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes by using only several of the most significant bits of the counter to change the A/D converter reference voltage.