Abstract: An improved low-voltage MOS device having high ruggedness, low on-resistance, and improved body diode reverse recovery characteristics comprises a semiconductor substrate on which is disposed a doped upper layer of a first conduction type. The upper layer includes a doped first well region of the first conduction type and a doped well region of the second conduction type underlying the first well region. The upper layer further includes at its upper surface a heavily doped source region of the first conduction type and a heavily doped body region of a second and opposite conduction type. A trench gate comprising a conductive material separated from the upper layer by an insulating layer is disposed in the upper layer of the substrate.

Abstract: An improved low-voltage MOS device having high ruggedness, low on-resistance, and improved body diode reverse recovery characteristics comprises a semiconductor substrate on which is disposed a doped upper layer of a first conduction type. The upper layer includes at its upper surface a blanket implant of the first conduction type, a heavily doped source region of the first conduction type, and a heavily doped body region of a second and opposite conduction type. The upper layer further includes a doped first well region of the first conduction type and a doped well region of the second conduction type underlying the source and body regions. The first well region underlies the second well region and merges with the blanket implant to form a heavily doped neck region that abuts the second well region at the upper surface of the upper layer. A gate comprising a conductive material separated from the upper layer by an insulating layer is disposed on the upper layer overlying the heavily doped neck region.

Abstract: Methods of forming power semiconductor devices having merged split-well body regions include the steps of forming a semiconductor substrate containing a drift region of first conductivity type (e.g., N-type) therein extending to a first face thereof. First and second split-well body regions of second conductivity type (e.g., P-type) may also be formed at spaced locations in the drift region. First and second source regions of first conductivity type are also formed in the first and second split-well body regions, respectively. A central body/contact region of second conductivity type is also formed in the drift region, at a location intermediate the first and second split-well body regions. The central body/contact region preferably forms non-rectifying junctions with the first and second split-well body regions and a P-N rectifying junction with the drift region at a central junction depth which is less than the maximum well junction depths of the split-well body regions.

Abstract: An improvement for lowering the source impedance exhibited by a shunt voltage regulator of the type including a self-biased transistor connected between the output terminals. A sensing resistance is connected between the base and collector of the self-biased transistor for providing a voltage responsive to the collector current that controls the conduction of current by a controllable current conductive device between the output terminals.

Abstract: A semicondutor device has an electrode with a configuration having a trunk portion and at least one comb-like portion. The comb-like portion has a back with ends and a plurality of conductive fingers extending therefrom. The trunk portion has a segment which is substantially parallel to the back of the comb-like portion. The trunk portion contacts the comb-like portion at a point intermediate the ends of the back.

Abstract: A first reference voltage which exhibits a negative coefficient of change with temperature is developed as an offset potential across a forward-biased semiconductor junction or a series string of such junctions operated at an absolute temperature T. A second reference voltage which varies in linear proportion to the absolute temperature T is additively combined with the first reference voltage to simulate a higher density of forward current flow through the semiconductor junctions.

Abstract: Current mirror amplifiers, which exhibit greater current attenuation (or gain) than prior art current mirror amplifiers taking up the same area on a monolithic integrated circuit die, are described in which the base-emitter junctions of the mirroring transistors are dissimilar in profile.

Abstract: The collector currents of first and second junction transistors which have base electrodes biased at the same quiescent potential and have emitter electrodes connected via respective emitter degeneration resistances to a common point, are adjusted relative to each other. This is done by applying linearly temperature-dependent voltages in adjustable ratio with each other to the emitter degeneration resistances. This makes it so that the adjustment of the relative values of the collector currents is substantially unchanging over a temperature range.

Abstract: The collector currents of first and second junction transistors which have base electrodes biased at the same quiescent potential and have emitter electrodes connected via respective emitter degeneration resistances to a common point, are adjusted relative to each other. This is done by applying temperature-independent currents in adjustable ratio with each other to the emitter degeneration resistances. The resistances have temperature coefficients of 1/T.sub.O to make the adjustment of the collector currents substantially unchanging for a range of temperatures around T.sub.0.

Abstract: The current gain of a current mirror amplifier (CMA) is trimmed by applying an adjustable potential difference between the base-emitter potentials of first and second transistors of the CMA, this potential difference being substantially linearly proportional to the absolute temperature at which the first and second transistors are operated. The resultant trim maintains itself over a wide range of temperature.

Abstract: A semiconductor device comprising a plurality of cells is disclosed. Each cell contains at least one bi-polar transistor and a diode serially connected to the base of the transistor therein. Each cell is connected in parallel relation with each other cell. The diode in each cell is located in close proximity to the transistor therein so that the thermal gradient therebetween is small.

Abstract: An input signal current is superimposed on a direct current. The resultant unidirectional composite signal is symmetrically peak-limited or clipped. Thereafter, the direct current component is extracted to leave a bidirectional signal current which has symmetrically limited peaks and substantially no direct component.

Abstract: A bridge-output amplifier, comprising four transistor means connected in bridge responsive to a drive signal to supply opposite ends of a cross-arm load with push-pull output signals, has direct-coupled differential mode feedback to reduce the quiescent potential applied across the load. This feedback is provided by a difference amplifier having the push-pull output signals applied to respective ones of its inverting and non-inverting input circuits and supplying a feedback signal at its output circuit. This feedback signal is used to improve the balance of the bridge.

Abstract: PNP composite transistors connected as commonemitter amplifiers each comprise a PNP pre-amplifier transistor in direct coupled cascade with a plurality of parallelled NPN transistors. The emitter-electrode of the PNP transistor is connected to a sensing resistor in the collector path of one of these NPN transistors, causing the "base-to-emitter" potential of the composite transistor to increase if its "emitter" current exceeds a threshold current. By clamping this base-to-emitter potential if it exceeds a predetermined potential, the output current of the composite transistor is prevented from becoming excessive. This predetermined potential is controlled as a function of composite transistor temperature and supply potential to provide the required degree of over-current protection for these particular conditions.

Abstract: In a direct-coupled cascade of first and second amplifier stages respectively including first and second complementary-conductivity transistors, the collector electrode of the first transistor being connected to the base electrode of the second transistor, there is a delay in recovery of response to input signal after a sustained input signal overswing condition. This delay is obviated by direct coupling an auxiliary amplifier stage having a gain of relatively low amplitude and opposite sense as compared to the first amplifier stage, in parallel with the first amplifier stage. The auxiliary amplifier prevents the discharge of capacitances in the second amplifier stage when the conduction of the first transistor is cut off. Then, upon the resumption of conduction of the first transistor, no time is needed for re-charging the capacitances before the second transistor can be drawn back into conduction.