Patents by Inventor Carl Gygi

Carl Gygi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140052404
    Abstract: Methods and structure are disclosed for analyzing different signaling pathways through a test signal selection hierarchy utilizing test patterns. One embodiment comprises an integrated circuit that includes a block of circuitry, a test signal generator, and a test signal selection hierarchy. The block of circuitry generates internal operational (TOP) signals for performing functions. The test signal generator generates test patterns that correspond with the IOP signals. The test signal selection hierarchy receives IOP signals and the test patterns, and selectively routes received signals to test pads. The test signal selection hierarchy routes the test patterns via signaling pathways through the test signal selection hierarchy to provide outputs signals on the test pads. The output signals are usable by an external test system to determine two or more of: a crosstalk, inter-symbol interference, a signal skew, and a threshold voltage for detecting bit transition on signaling pathways.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 20, 2014
    Applicant: LSI CORPORATION
    Inventors: Coralyn S. Gauvin, Steven E. Start, Carl Gygi
  • Patent number: 8606989
    Abstract: Methods and apparatus are provided for burst transfers of data between DDR memories and embedded processors during training of the PHY interface in an embedded system. An embedded system comprises an embedded processor having at least one cache controller; a memory, wherein the memory has an atomic memory access that comprises a plurality of clock edges; and a memory controller having a physical interface to convert digital signals between the embedded processor and the memory, wherein the cache controller executes a training process to determine a delay through the physical interface for each of the plurality of clock edges using a burst transfer of data. The burst transfer comprises reading a data pattern from the memory and storing the data pattern in one or more registers in the embedded processor.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: December 10, 2013
    Assignee: LSI Corporation
    Inventors: Craig R. Chafin, Carl Gygi, Adam S. Browen
  • Patent number: 8331429
    Abstract: Apparatus and methods for improved high-speed communication by exchanging low-speed information regarding the high-speed exchanges over the same communication medium. In one exemplary embodiment, a communication device includes a high-speed transceiver adapted to exchange high-speed data with another device via a communication medium using high-frequency signals. The device also includes a low-speed component adapted to exchange low-speed information over the same communication medium as low-frequency signals. The low-frequency signals may be applied as common mode signals to a differential communication path so as to not interfere with the high-speed data exchanges. In another embodiment, a high-pass filter may be included in the device to remove the low-frequency signals before the high-speed data is applied to the high-speed transceiver. Responsive to receipt of the low-speed information, a device may adjust parameters of the transceiver to improve the high-speed data exchanges.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: December 11, 2012
    Assignee: LSI Corporation
    Inventors: Luke E. McKay, Carl Gygi, Brian K. Einsweiler, Brian J. Varney
  • Publication number: 20120054424
    Abstract: Methods and apparatus are provided for burst transfers of data between DDR memories and embedded processors during training of the PHY interface in an embedded system. An embedded system comprises an embedded processor having at least one cache controller; a memory, wherein the memory has an atomic memory access that comprises a plurality of clock edges; and a memory controller having a physical interface to convert digital signals between the embedded processor and the memory, wherein the cache controller executes a training process to determine a delay through the physical interface for each of the plurality of clock edges using a burst transfer of data. The burst transfer comprises reading a data pattern from the memory and storing the data pattern in one or more registers in the embedded processor.
    Type: Application
    Filed: August 31, 2010
    Publication date: March 1, 2012
    Inventors: Craig R. Chafin, Carl Gygi, Adam S. Browen
  • Patent number: 7958395
    Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: June 7, 2011
    Assignee: LSI Corporation
    Inventors: Carl Gygi, Andrew Hadley, Erik Paulsen
  • Publication number: 20110103439
    Abstract: Apparatus and methods for improved high-speed communication by exchanging low-speed information regarding the high-speed exchanges over the same communication medium. In one exemplary embodiment, a communication device includes a high-speed transceiver adapted to exchange high-speed data with another device via a communication medium using high-frequency signals. The device also includes a low-speed component adapted to exchange low-speed information over the same communication medium as low-frequency signals. The low-frequency signals may be applied as common mode signals to a differential communication path so as to not interfere with the high-speed data exchanges. In another embodiment, a high-pass filter may be included in the device to remove the low-frequency signals before the high-speed data is applied to the high-speed transceiver. Responsive to receipt of the low-speed information, a device may adjust parameters of the transceiver to improve the high-speed data exchanges.
    Type: Application
    Filed: November 5, 2009
    Publication date: May 5, 2011
    Applicant: LSI CORPORATION
    Inventors: Luke E. McKay, Carl Gygi, Brian K. Einsweiler, Brian J. Varney
  • Patent number: 7366957
    Abstract: The present invention is a method and system for providing a complete validation of an initiator and target within bus architecture. A target's behavior may be controlled by an initiator. Control of the target may be through execution of initiator commands including vendor unique commands relating to desired characteristics for testing. The initiator's response to the target's behavior may be verified due to the handshaking communication protocol between a target and initiator. Additionally, by altering the behavior of the target to test initiator response, a target's behavior is also validated.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: April 29, 2008
    Assignee: LSI Corporation
    Inventors: Erik Paulsen, Carl Gygi, Mark Slutz
  • Publication number: 20080046784
    Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.
    Type: Application
    Filed: October 15, 2007
    Publication date: February 21, 2008
    Inventors: Carl Gygi, Andrew Hadley, Erik Paulsen
  • Patent number: 7324912
    Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: January 29, 2008
    Assignee: LSI Logic Corporation
    Inventors: Carl Gygi, Andrew Hadley, Erik Paulsen
  • Publication number: 20050193178
    Abstract: A multi-chip module (MCM) designed using standard die SAS expander components for rapidly designing a customized SAS expander having a predetermined number of ports. A number of standard expander die circuit components are selected and disposed on a MCM design. Each expander die circuit has a predetermined number of internal ports within the MCM and a predetermined number of ports for coupling to SAS devices external to the MCM. An internal fabric is disposed on the MCM and selectively coupled to internal ports of the SAS expanders to provide the desired number of external ports with desired routing therebetween. The internal fabric may be statically configured or dynamically programmed. The internal fabric routing may provide wide port routes as well as standard port connections.
    Type: Application
    Filed: February 27, 2004
    Publication date: September 1, 2005
    Inventors: William Voorhees, Carl Gygi
  • Publication number: 20050028044
    Abstract: The present invention is a method and system for providing a complete validation of an initiator and target within bus architecture. A target's behavior may be controlled by an initiator. Control of the target may be through execution of initiator commands including vendor unique commands relating to desired characteristics for testing. The initiator's response to the target's behavior may be verified due to the handshaking communication protocol between a target and initiator. Additionally, by altering the behavior of the target to test initiator response, a target's behavior is also validated.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 3, 2005
    Inventors: Erik Paulsen, Carl Gygi, Mark Slutz
  • Publication number: 20040102978
    Abstract: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test include entering commands through a prompt line on a graphical user interface, reading commands from a file, or manipulating graphical objects representing components or devices and operations on a graphical user interface. A script may serve as a metric to determine the successfulness of a test or battery of tests of the device under test.
    Type: Application
    Filed: November 25, 2002
    Publication date: May 27, 2004
    Inventors: Carl Gygi, Andrew Hadley, Erik Paulsen
  • Publication number: 20040044693
    Abstract: Disclosed is a system and method for determining the configuration of a personal computer and storing the configuration for further use, such as administrative analyses. The configuration of a personal computer may be stored locally or in a database located on a network and shared with a plurality of other personal computers.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 4, 2004
    Inventors: Andrew Hadley, Mark Slutz, David So, Carl Gygi