Abstract: A method and apparatus for enabling a user to define a panning and zooming path across a still image in a digital imaging device during interactive movie creation. The method and apparatus include allowing the user to define the position of a plurality of key frames on the still image, allowing the user to size the key frames to control the zoom during the movie, and allowing the user to set the key frames on the still image to fix each of the key frame's position and size.

Abstract: A method and system for interactively creating a movie from a still image in a digital imaging device that includes a display screen. The method and system include determining a path of panning across the still image, generating image frames along the path of panning, and then displaying the image frames for a predetermined time interval on the display screen to play the movie.

Abstract: A method of determining the outline of a character in a character recognition system, the character being included in a segment comprising a plurality of pixels which are either white corresponding to the absence of information or black corresponding to the presence of information, the method including the steps of: searching the segment of pixels to detect the location of the first black pixel nearest one edge of the segment; storing the location in the segment of the first detected black pixel; scanning those pixels in the segment within a predetermined distance from the first detected black pixel to detect a second black pixel; storing the location in the segment of the second detected black pixel; and continuing the scanning to successively detect black pixels surrounding the last detected black pixel.

Abstract: A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded.

Abstract: A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-instructions of both a basic and an extended instruction set, each macro-instruction containing in itself selected bit patterns which uniquely identify which type of instruction is to be decoded. The decoded macro-instructions provide the starting address of one or more micro-instructions, which address is supplied to a unique micro-instruction sequencing unit which appropriately decodes a selected field of each micro-instruction to obtain each successive micro-instruction. The system uses hierarchical memory storage using eight storage segments (rings), access to the rings being controlled in a privileged manner according to different levels of privilege.